dflr 47 arch/microblaze/include/asm/cacheflush.h void (*dflr)(unsigned long a, unsigned long b); dflr 73 arch/microblaze/include/asm/cacheflush.h #define flush_dcache_range(start, end) mbc->dflr(start, end); dflr 522 arch/microblaze/kernel/cpu/cache.c .dflr = __flush_dcache_range_wb, dflr 538 arch/microblaze/kernel/cpu/cache.c .dflr = __flush_dcache_range_wb, dflr 554 arch/microblaze/kernel/cpu/cache.c .dflr = __invalidate_dcache_range_msr_irq_wt, dflr 569 arch/microblaze/kernel/cpu/cache.c .dflr = __invalidate_dcache_range_nomsr_irq, dflr 585 arch/microblaze/kernel/cpu/cache.c .dflr = __invalidate_dcache_range_nomsr_wt, dflr 600 arch/microblaze/kernel/cpu/cache.c .dflr = __invalidate_dcache_range_nomsr_wt,