DVMM_PTE_ARB_CONTROL  158 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c 	REG_UPDATE_2(DVMM_PTE_ARB_CONTROL,
DVMM_PTE_ARB_CONTROL   59 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	SRI(DVMM_PTE_ARB_CONTROL, DCP, id)
DVMM_PTE_ARB_CONTROL   98 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	uint32_t DVMM_PTE_ARB_CONTROL;
DVMM_PTE_ARB_CONTROL  172 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	SFB(blk, DVMM_PTE_ARB_CONTROL, DVMM_PTE_REQ_PER_CHUNK, mask_sh),\
DVMM_PTE_ARB_CONTROL  173 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	SFB(blk, DVMM_PTE_ARB_CONTROL, DVMM_MAX_PTE_REQ_OUTSTANDING, mask_sh)