DU_DR5            312 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define IP7_3_0		FM(D13)			FM(LCDOUT5)	FM(MSIOF2_SS2_D)	FM(TX4_C)			FM(VI4_DATA5_A)	F_(0, 0)	FM(DU_DR5)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR5           1005 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c 	PINMUX_IPSR_GPSR(IP7_3_0,	DU_DR5),
DU_DR5            313 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define IP7_3_0		FM(D13)			FM(LCDOUT5)	FM(MSIOF2_SS2_D)	FM(TX4_C)			FM(VI4_DATA5_A)	F_(0, 0)	FM(DU_DR5)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR5           1012 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_GPSR(IP7_3_0,	DU_DR5),
DU_DR5            319 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define IP7_3_0		FM(D13)			FM(LCDOUT5)	FM(MSIOF2_SS2_D)	FM(TX4_C)			FM(VI4_DATA5_A)	F_(0, 0)	FM(DU_DR5)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR5           1015 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_GPSR(IP7_3_0,	DU_DR5),
DU_DR5            320 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define IP7_3_0		FM(D13)			FM(LCDOUT5)	FM(MSIOF2_SS2_D)	FM(TX4_C)			FM(VI4_DATA5_A)	F_(0, 0)	FM(DU_DR5)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR5           1018 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_GPSR(IP7_3_0,	DU_DR5),
DU_DR5             53 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define GPSR0_3		F_(DU_DR5,			IP0_15_12)
DU_DR5            156 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define IP0_15_12	FM(DU_DR5)			FM(HTX0)		F_(0, 0)	FM(A3)		F_(0, 0)		F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR5            396 drivers/pinctrl/sh-pfc/pfc-r8a77970.c 	PINMUX_IPSR_GPSR(IP0_15_12,	DU_DR5),
DU_DR5             54 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define GPSR0_3		F_(DU_DR5,			IP0_15_12)
DU_DR5            189 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define IP0_15_12	FM(DU_DR5)			FM(CTS4_N)		FM(GETHER_RMII_RXD1)	FM(A3)		F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR5            467 drivers/pinctrl/sh-pfc/pfc-r8a77980.c 	PINMUX_IPSR_GPSR(IP0_15_12,	DU_DR5),
DU_DR5            266 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define IP6_11_8	FM(D5)			FM(RX3_A)		FM(HRX3_B)		F_(0, 0)		F_(0, 0)		FM(DU_DR5)	FM(VI4_DATA4_B)	F_(0, 0)	FM(LCDOUT21)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR5            874 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_GPSR(IP6_11_8,		DU_DR5),
DU_DR5             56 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define GPSR1_21	F_(DU_DR5,		IP3_19_16)
DU_DR5            227 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define IP3_19_16	FM(DU_DR5)		FM(LCDOUT21)		FM(NMI)			F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR5            635 drivers/pinctrl/sh-pfc/pfc-r8a77995.c 	PINMUX_IPSR_GPSR(IP3_19_16,	DU_DR5),