DU_DR3            310 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define IP6_27_24	FM(D11)			FM(LCDOUT3)	FM(MSIOF2_TXD_D)	FM(HTX3_B)			FM(VI4_DATA3_A)	FM(RTS4_N_C)	FM(DU_DR3)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR3            990 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c 	PINMUX_IPSR_GPSR(IP6_27_24,	DU_DR3),
DU_DR3            311 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define IP6_27_24	FM(D11)			FM(LCDOUT3)	FM(MSIOF2_TXD_D)	FM(HTX3_B)			FM(VI4_DATA3_A)	FM(RTS4_N_C)	FM(DU_DR3)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR3            997 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_GPSR(IP6_27_24,	DU_DR3),
DU_DR3            315 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define IP6_27_24	FM(D11)			FM(LCDOUT3)	FM(MSIOF2_TXD_D)	FM(HTX3_B)			FM(VI4_DATA3_A)	FM(RTS4_N_C)	FM(DU_DR3)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR3           1000 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_GPSR(IP6_27_24,	DU_DR3),
DU_DR3            316 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define IP6_27_24	FM(D11)			FM(LCDOUT3)	FM(MSIOF2_TXD_D)	FM(HTX3_B)			FM(VI4_DATA3_A)	FM(RTS4_N_C)	FM(DU_DR3)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR3           1003 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_GPSR(IP6_27_24,	DU_DR3),
DU_DR3             55 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define GPSR0_1		F_(DU_DR3,			IP0_7_4)
DU_DR3            154 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define IP0_7_4		FM(DU_DR3)			FM(HRTS0_N)		F_(0, 0)	FM(A1)		F_(0, 0)		F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR3            388 drivers/pinctrl/sh-pfc/pfc-r8a77970.c 	PINMUX_IPSR_GPSR(IP0_7_4,	DU_DR3),
DU_DR3             56 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define GPSR0_1		F_(DU_DR3,			IP0_7_4)
DU_DR3            187 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define IP0_7_4		FM(DU_DR3)			FM(RX4)			FM(GETHER_RMII_RX_ER)	FM(A1)		F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR3            457 drivers/pinctrl/sh-pfc/pfc-r8a77980.c 	PINMUX_IPSR_GPSR(IP0_7_4,	DU_DR3),
DU_DR3            263 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define IP5_31_28	FM(D2)			FM(MSIOF3_RXD_A)	FM(RX5_C)		F_(0, 0)		FM(VI5_DATA14_A)	FM(DU_DR3)	FM(RX4_C)	F_(0, 0)	FM(LCDOUT19)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR3            850 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_GPSR(IP5_31_28,		DU_DR3),
DU_DR3             58 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define GPSR1_19	F_(DU_DR3,		IP3_11_8)
DU_DR3            225 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define IP3_11_8	FM(DU_DR3)		FM(LCDOUT19)		FM(PWM1_B)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR3            627 drivers/pinctrl/sh-pfc/pfc-r8a77995.c 	PINMUX_IPSR_GPSR(IP3_11_8,	DU_DR3),