DU_DR2            309 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define IP6_23_20	FM(D10)			FM(LCDOUT2)	FM(MSIOF2_RXD_D)	FM(HRX3_B)			FM(VI4_DATA2_A)	FM(CTS4_N_C)	FM(DU_DR2)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR2            982 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c 	PINMUX_IPSR_GPSR(IP6_23_20,	DU_DR2),
DU_DR2            310 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define IP6_23_20	FM(D10)			FM(LCDOUT2)	FM(MSIOF2_RXD_D)	FM(HRX3_B)			FM(VI4_DATA2_A)	FM(CTS4_N_C)	FM(DU_DR2)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR2            989 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_GPSR(IP6_23_20,	DU_DR2),
DU_DR2            314 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define IP6_23_20	FM(D10)			FM(LCDOUT2)	FM(MSIOF2_RXD_D)	FM(HRX3_B)			FM(VI4_DATA2_A)	FM(CTS4_N_C)	FM(DU_DR2)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR2            992 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_GPSR(IP6_23_20,	DU_DR2),
DU_DR2            315 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define IP6_23_20	FM(D10)			FM(LCDOUT2)	FM(MSIOF2_RXD_D)	FM(HRX3_B)			FM(VI4_DATA2_A)	FM(CTS4_N_C)	FM(DU_DR2)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR2            995 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_GPSR(IP6_23_20,	DU_DR2),
DU_DR2             56 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define GPSR0_0		F_(DU_DR2,			IP0_3_0)
DU_DR2            153 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define IP0_3_0		FM(DU_DR2)			FM(HSCK0)		F_(0, 0)	FM(A0)		F_(0, 0)		F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR2            384 drivers/pinctrl/sh-pfc/pfc-r8a77970.c 	PINMUX_IPSR_GPSR(IP0_3_0,	DU_DR2),
DU_DR2             57 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define GPSR0_0		F_(DU_DR2,			IP0_3_0)
DU_DR2            186 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define IP0_3_0		FM(DU_DR2)			FM(SCK4)		FM(GETHER_RMII_CRS_DV)	FM(A0)		F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR2            452 drivers/pinctrl/sh-pfc/pfc-r8a77980.c 	PINMUX_IPSR_GPSR(IP0_3_0,	DU_DR2),
DU_DR2            261 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define IP5_23_20	FM(D0)			FM(MSIOF3_SCK_A)	F_(0, 0)		F_(0, 0)		F_(0, 0)		FM(DU_DR2)	FM(CTS4_N_C)	F_(0, 0)	FM(LCDOUT18)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR2            833 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_GPSR(IP5_23_20,		DU_DR2),
DU_DR2             59 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define GPSR1_18	F_(DU_DR2,		IP3_7_4)
DU_DR2            224 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define IP3_7_4		FM(DU_DR2)		FM(LCDOUT18)		FM(PWM0_B)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
DU_DR2            623 drivers/pinctrl/sh-pfc/pfc-r8a77995.c 	PINMUX_IPSR_GPSR(IP3_7_4,	DU_DR2),