dev_caps 346 arch/arm/mach-omap1/dma.c d->dev_caps = ENABLE_1510_MODE; dev_caps 347 arch/arm/mach-omap1/dma.c enable_1510_mode = d->dev_caps & ENABLE_1510_MODE; dev_caps 350 arch/arm/mach-omap1/dma.c d->dev_caps = ENABLE_16XX_MODE; dev_caps 352 arch/arm/mach-omap1/dma.c d->dev_caps |= SRC_PORT; dev_caps 353 arch/arm/mach-omap1/dma.c d->dev_caps |= DST_PORT; dev_caps 354 arch/arm/mach-omap1/dma.c d->dev_caps |= SRC_INDEX; dev_caps 355 arch/arm/mach-omap1/dma.c d->dev_caps |= DST_INDEX; dev_caps 356 arch/arm/mach-omap1/dma.c d->dev_caps |= IS_BURST_ONLY4; dev_caps 357 arch/arm/mach-omap1/dma.c d->dev_caps |= CLEAR_CSR_ON_READ; dev_caps 358 arch/arm/mach-omap1/dma.c d->dev_caps |= IS_WORD_16; dev_caps 364 arch/arm/mach-omap1/dma.c if (d->dev_caps & ENABLE_1510_MODE) dev_caps 273 arch/arm/mach-omap2/dma.c d->dev_caps |= HS_CHANNELS_RESERVED; dev_caps 276 arch/arm/mach-omap2/dma.c d->dev_caps |= DMA_ENGINE_HANDLE_IRQ; dev_caps 131 arch/arm/mach-omap2/omap_hwmod_2420_data.c .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | dev_caps 126 arch/arm/mach-omap2/omap_hwmod_2430_data.c .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | dev_caps 838 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | dev_caps 427 arch/arm/mach-omap2/omap_hwmod_44xx_data.c .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | dev_caps 262 arch/arm/mach-omap2/omap_hwmod_54xx_data.c .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | dev_caps 417 arch/arm/mach-omap2/omap_hwmod_7xx_data.c .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | dev_caps 768 arch/arm/plat-omap/dma.c if (d->dev_caps & IS_RW_PRIORITY) dev_caps 1302 arch/arm/plat-omap/dma.c if ((d->dev_caps & RESERVE_CHANNEL) && omap_dma_reserve_channels dev_caps 1308 arch/arm/plat-omap/dma.c enable_1510_mode = d->dev_caps & ENABLE_1510_MODE; dev_caps 1362 arch/arm/plat-omap/dma.c if (d->dev_caps & IS_RW_PRIORITY) dev_caps 1366 arch/arm/plat-omap/dma.c if (dma_omap2plus() && !(d->dev_caps & DMA_ENGINE_HANDLE_IRQ)) { dev_caps 1383 arch/arm/plat-omap/dma.c if (d->dev_caps & HS_CHANNELS_RESERVED) { dev_caps 383 drivers/hwtracing/coresight/coresight-tmc.c static int tmc_etr_setup_caps(struct device *parent, u32 devid, void *dev_caps) dev_caps 393 drivers/hwtracing/coresight/coresight-tmc.c tmc_etr_init_caps(drvdata, (u32)(unsigned long)dev_caps); dev_caps 293 drivers/hwtracing/coresight/coresight-tmc.h static inline void tmc_etr_init_caps(struct tmc_drvdata *drvdata, u32 dev_caps) dev_caps 296 drivers/hwtracing/coresight/coresight-tmc.h drvdata->etr_caps = dev_caps; dev_caps 1111 drivers/infiniband/hw/mlx4/main.c resp.dev_caps = dev->dev->caps.userspace_caps; dev_caps 643 drivers/infiniband/hw/qedr/main.c attr->dev_caps = qed_attr->dev_caps; dev_caps 116 drivers/infiniband/hw/qedr/qedr.h u32 dev_caps; dev_caps 3211 drivers/net/ethernet/intel/i40e/i40e_common.c p = &hw->dev_caps; dev_caps 6086 drivers/net/ethernet/intel/i40e/i40e_main.c if (hw->dev_caps.switch_mode) { dev_caps 6090 drivers/net/ethernet/intel/i40e/i40e_main.c u32 switch_mode = hw->dev_caps.switch_mode & dev_caps 6097 drivers/net/ethernet/intel/i40e/i40e_main.c hw->dev_caps.switch_mode); dev_caps 9600 drivers/net/ethernet/intel/i40e/i40e_main.c pf->hw.dev_caps.switch_mode, dev_caps 9601 drivers/net/ethernet/intel/i40e/i40e_main.c pf->hw.dev_caps.valid_functions); dev_caps 9604 drivers/net/ethernet/intel/i40e/i40e_main.c pf->hw.dev_caps.sr_iov_1_1, dev_caps 9605 drivers/net/ethernet/intel/i40e/i40e_main.c pf->hw.dev_caps.num_vfs); dev_caps 9608 drivers/net/ethernet/intel/i40e/i40e_main.c pf->hw.dev_caps.num_vsis, dev_caps 9609 drivers/net/ethernet/intel/i40e/i40e_main.c pf->hw.dev_caps.num_rx_qp, dev_caps 9610 drivers/net/ethernet/intel/i40e/i40e_main.c pf->hw.dev_caps.num_tx_qp); dev_caps 581 drivers/net/ethernet/intel/i40e/i40e_type.h struct i40e_hw_capabilities dev_caps; dev_caps 926 drivers/net/ethernet/intel/iavf/iavf_common.c hw->dev_caps.num_vsis = msg->num_vsis; dev_caps 927 drivers/net/ethernet/intel/iavf/iavf_common.c hw->dev_caps.num_rx_qp = msg->num_queue_pairs; dev_caps 928 drivers/net/ethernet/intel/iavf/iavf_common.c hw->dev_caps.num_tx_qp = msg->num_queue_pairs; dev_caps 929 drivers/net/ethernet/intel/iavf/iavf_common.c hw->dev_caps.num_msix_vectors_vf = msg->max_vectors; dev_caps 930 drivers/net/ethernet/intel/iavf/iavf_common.c hw->dev_caps.dcb = msg->vf_cap_flags & dev_caps 932 drivers/net/ethernet/intel/iavf/iavf_common.c hw->dev_caps.fcoe = 0; dev_caps 185 drivers/net/ethernet/intel/iavf/iavf_type.h struct iavf_hw_capabilities dev_caps; dev_caps 1605 drivers/net/ethernet/intel/ice/ice_common.c funcs = hweight8(hw->dev_caps.common_cap.valid_functions & dev_caps 1640 drivers/net/ethernet/intel/ice/ice_common.c dev_p = &hw->dev_caps; dev_caps 1863 drivers/net/ethernet/intel/ice/ice_common.c struct ice_hw_dev_caps *dev_caps = &hw->dev_caps; dev_caps 1895 drivers/net/ethernet/intel/ice/ice_common.c valid_func = dev_caps->common_cap.valid_functions; dev_caps 1896 drivers/net/ethernet/intel/ice/ice_common.c txq_first_id = dev_caps->common_cap.txq_first_id; dev_caps 1897 drivers/net/ethernet/intel/ice/ice_common.c rxq_first_id = dev_caps->common_cap.rxq_first_id; dev_caps 1898 drivers/net/ethernet/intel/ice/ice_common.c msix_vector_first_id = dev_caps->common_cap.msix_vector_first_id; dev_caps 1899 drivers/net/ethernet/intel/ice/ice_common.c max_mtu = dev_caps->common_cap.max_mtu; dev_caps 1902 drivers/net/ethernet/intel/ice/ice_common.c memset(dev_caps, 0, sizeof(*dev_caps)); dev_caps 1905 drivers/net/ethernet/intel/ice/ice_common.c dev_caps->common_cap.valid_functions = valid_func; dev_caps 1906 drivers/net/ethernet/intel/ice/ice_common.c dev_caps->common_cap.txq_first_id = txq_first_id; dev_caps 1907 drivers/net/ethernet/intel/ice/ice_common.c dev_caps->common_cap.rxq_first_id = rxq_first_id; dev_caps 1908 drivers/net/ethernet/intel/ice/ice_common.c dev_caps->common_cap.msix_vector_first_id = msix_vector_first_id; dev_caps 1909 drivers/net/ethernet/intel/ice/ice_common.c dev_caps->common_cap.max_mtu = max_mtu; dev_caps 1918 drivers/net/ethernet/intel/ice/ice_common.c dev_caps->common_cap.num_rxq = num_func; dev_caps 1919 drivers/net/ethernet/intel/ice/ice_common.c dev_caps->common_cap.num_txq = num_func; dev_caps 1922 drivers/net/ethernet/intel/ice/ice_common.c dev_caps->common_cap.num_msix_vectors = 2 * num_func; dev_caps 432 drivers/net/ethernet/intel/ice/ice_type.h struct ice_hw_dev_caps dev_caps; /* device capabilities */ dev_caps 448 drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c u32 dev_caps = mlx5_fpga_ipsec_device_caps(mdev); dev_caps 451 drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c if (dev_caps & MLX5_ACCEL_IPSEC_CAP_RX_NO_TRAILER) dev_caps 522 drivers/net/ethernet/qlogic/qed/qed_rdma.c dev->dev_caps = 0; dev_caps 523 drivers/net/ethernet/qlogic/qed/qed_rdma.c SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_RNR_NAK, 1); dev_caps 524 drivers/net/ethernet/qlogic/qed/qed_rdma.c SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_PORT_ACTIVE_EVENT, 1); dev_caps 525 drivers/net/ethernet/qlogic/qed/qed_rdma.c SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_PORT_CHANGE_EVENT, 1); dev_caps 526 drivers/net/ethernet/qlogic/qed/qed_rdma.c SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_RESIZE_CQ, 1); dev_caps 527 drivers/net/ethernet/qlogic/qed/qed_rdma.c SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_BASE_MEMORY_EXT, 1); dev_caps 528 drivers/net/ethernet/qlogic/qed/qed_rdma.c SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_BASE_QUEUE_EXT, 1); dev_caps 529 drivers/net/ethernet/qlogic/qed/qed_rdma.c SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_ZBVA, 1); dev_caps 530 drivers/net/ethernet/qlogic/qed/qed_rdma.c SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_LOCAL_INV_FENCE, 1); dev_caps 537 drivers/net/ethernet/qlogic/qed/qed_rdma.c SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_ATOMIC_OP, 1); dev_caps 251 include/linux/omap-dma.h u32 dev_caps; dev_caps 294 include/linux/omap-dma.h #define __dma_omap15xx(d) (dma_omap1() && (d)->dev_caps & ENABLE_1510_MODE) dev_caps 295 include/linux/omap-dma.h #define __dma_omap16xx(d) (dma_omap1() && (d)->dev_caps & ENABLE_16XX_MODE) dev_caps 102 include/linux/qed/qed_rdma_if.h u32 dev_caps; dev_caps 67 include/uapi/rdma/mlx4-abi.h __u32 dev_caps;