dev_cap            71 drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c 			  struct hinic_dev_cap *dev_cap)
dev_cap            79 drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c 	if (dev_cap->intr_type != INTR_MSIX_TYPE)
dev_cap            92 drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c 	nic_cap->max_qps = dev_cap->max_sqs + 1;
dev_cap            93 drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c 	if (nic_cap->max_qps != (dev_cap->max_rqs + 1))
dev_cap           113 drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c 	struct hinic_dev_cap dev_cap;
dev_cap           118 drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c 	out_len = sizeof(dev_cap);
dev_cap           121 drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c 				HINIC_CFG_NIC_CAP, &dev_cap, in_len, &dev_cap,
dev_cap           128 drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c 	return get_capability(hwdev, &dev_cap);
dev_cap           725 drivers/net/ethernet/mellanox/mlx4/fw.c int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
dev_cap           831 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->flags2 = 0;
dev_cap           845 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->reserved_qps = 1 << (field & 0xf);
dev_cap           847 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_qps = 1 << (field & 0x1f);
dev_cap           849 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->reserved_srqs = 1 << (field >> 4);
dev_cap           851 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_srqs = 1 << (field & 0x1f);
dev_cap           853 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_cq_sz = 1 << field;
dev_cap           855 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->reserved_cqs = 1 << (field & 0xf);
dev_cap           857 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_cqs = 1 << (field & 0x1f);
dev_cap           859 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_mpts = 1 << (field & 0x3f);
dev_cap           861 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->reserved_eqs = 1 << (field & 0xf);
dev_cap           863 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_eqs = 1 << (field & 0xf);
dev_cap           865 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->reserved_mtts = 1 << (field >> 4);
dev_cap           867 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->reserved_mrws = 1 << (field & 0xf);
dev_cap           869 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->num_sys_eqs = size & 0xfff;
dev_cap           871 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_requester_per_qp = 1 << (field & 0x3f);
dev_cap           873 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_responder_per_qp = 1 << (field & 0x3f);
dev_cap           877 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->max_gso_sz = 0;
dev_cap           879 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->max_gso_sz = 1 << field;
dev_cap           883 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_RSS_XOR;
dev_cap           885 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_RSS_TOP;
dev_cap           888 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_RSS;
dev_cap           889 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->max_rss_tbl_sz = 1 << field;
dev_cap           891 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->max_rss_tbl_sz = 0;
dev_cap           893 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_rdma_global = 1 << (field & 0x3f);
dev_cap           895 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->local_ca_ack_delay = field & 0x1f;
dev_cap           897 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->num_ports = field & 0xf;
dev_cap           899 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_msg_sz = 1 << (field & 0x1f);
dev_cap           902 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN;
dev_cap           905 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_FS_EN;
dev_cap           906 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->fs_log_max_ucast_qp_range_size = field & 0x1f;
dev_cap           908 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER;
dev_cap           911 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_PORT_BEACON;
dev_cap           914 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_DMFS_IPOIB;
dev_cap           916 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->fs_max_num_qp_per_entry = field;
dev_cap           919 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT;
dev_cap           922 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_QCN;
dev_cap           924 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->stat_rate_support = stat_rate;
dev_cap           927 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_TS;
dev_cap           930 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->flags = flags | (u64)ext_flags << 32;
dev_cap           932 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->wol_port[1] = !!(field & 0x20);
dev_cap           933 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->wol_port[2] = !!(field & 0x40);
dev_cap           935 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->reserved_uars = field >> 4;
dev_cap           937 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->uar_size = 1 << ((field & 0x3f) + 20);
dev_cap           939 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->min_page_sz = 1 << field;
dev_cap           944 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->bf_reg_size = 1 << (field & 0x1f);
dev_cap           946 drivers/net/ethernet/mellanox/mlx4/fw.c 		if ((1 << (field & 0x3f)) > (PAGE_SIZE / dev_cap->bf_reg_size))
dev_cap           948 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->bf_regs_per_page = 1 << (field & 0x3f);
dev_cap           950 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->bf_reg_size = 0;
dev_cap           954 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_sq_sg = field;
dev_cap           956 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_sq_desc_sz = size;
dev_cap           960 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_USER_MAC_EN;
dev_cap           963 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_SVLAN_BY_QP;
dev_cap           965 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_qp_per_mcg = 1 << field;
dev_cap           967 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->reserved_mgms = field & 0xf;
dev_cap           969 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_mcgs = 1 << field;
dev_cap           971 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->reserved_pds = field >> 4;
dev_cap           973 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_pds = 1 << (field & 0x3f);
dev_cap           975 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->reserved_xrcds = field >> 4;
dev_cap           977 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_xrcds = 1 << (field & 0x1f);
dev_cap           980 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->rdmarc_entry_sz = size;
dev_cap           982 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->qpc_entry_sz = size;
dev_cap           984 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->aux_entry_sz = size;
dev_cap           986 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->altc_entry_sz = size;
dev_cap           988 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->eqc_entry_sz = size;
dev_cap           990 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->cqc_entry_sz = size;
dev_cap           992 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->srq_entry_sz = size;
dev_cap           994 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->cmpt_entry_sz = size;
dev_cap           996 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->mtt_entry_sz = size;
dev_cap           998 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->dmpt_entry_sz = size;
dev_cap          1001 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_srq_sz = 1 << field;
dev_cap          1003 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_qp_sz = 1 << field;
dev_cap          1005 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->resize_srq = field & 1;
dev_cap          1007 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_rq_sg = field;
dev_cap          1009 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->max_rq_desc_sz = size;
dev_cap          1012 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_QOS_VPP;
dev_cap          1014 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL;
dev_cap          1016 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_CQE_STRIDE;
dev_cap          1018 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_EQE_STRIDE;
dev_cap          1019 drivers/net/ethernet/mellanox/mlx4/fw.c 	MLX4_GET(dev_cap->bmme_flags, outbox,
dev_cap          1021 drivers/net/ethernet/mellanox/mlx4/fw.c 	if (dev_cap->bmme_flags & MLX4_FLAG_ROCE_V1_V2)
dev_cap          1022 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_ROCE_V1_V2;
dev_cap          1023 drivers/net/ethernet/mellanox/mlx4/fw.c 	if (dev_cap->bmme_flags & MLX4_FLAG_PORT_REMAP)
dev_cap          1024 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_PORT_REMAP;
dev_cap          1027 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_CONFIG_DEV;
dev_cap          1029 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_IGNORE_FCS;
dev_cap          1032 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_PHV_EN;
dev_cap          1034 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN;
dev_cap          1036 drivers/net/ethernet/mellanox/mlx4/fw.c 	MLX4_GET(dev_cap->reserved_lkey, outbox,
dev_cap          1040 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP;
dev_cap          1042 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_RECOVERABLE_ERROR_EVENT;
dev_cap          1044 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_DRIVER_VERSION_TO_FW;
dev_cap          1047 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT;
dev_cap          1050 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN;
dev_cap          1053 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_VXLAN_OFFLOADS;
dev_cap          1055 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_ETS_CFG;
dev_cap          1056 drivers/net/ethernet/mellanox/mlx4/fw.c 	MLX4_GET(dev_cap->max_icm_sz, outbox,
dev_cap          1058 drivers/net/ethernet/mellanox/mlx4/fw.c 	if (dev_cap->flags & MLX4_DEV_CAP_FLAG_COUNTERS)
dev_cap          1059 drivers/net/ethernet/mellanox/mlx4/fw.c 		MLX4_GET(dev_cap->max_counters, outbox,
dev_cap          1065 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_MAD_DEMUX;
dev_cap          1067 drivers/net/ethernet/mellanox/mlx4/fw.c 	MLX4_GET(dev_cap->dmfs_high_rate_qpn_base, outbox,
dev_cap          1069 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->dmfs_high_rate_qpn_base &= MGM_QPN_MASK;
dev_cap          1070 drivers/net/ethernet/mellanox/mlx4/fw.c 	MLX4_GET(dev_cap->dmfs_high_rate_qpn_range, outbox,
dev_cap          1072 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->dmfs_high_rate_qpn_range &= MGM_QPN_MASK;
dev_cap          1075 drivers/net/ethernet/mellanox/mlx4/fw.c 	dev_cap->rl_caps.num_rates = size;
dev_cap          1076 drivers/net/ethernet/mellanox/mlx4/fw.c 	if (dev_cap->rl_caps.num_rates) {
dev_cap          1077 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT;
dev_cap          1079 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->rl_caps.max_val  = size & 0xfff;
dev_cap          1080 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->rl_caps.max_unit = size >> 14;
dev_cap          1082 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->rl_caps.min_val  = size & 0xfff;
dev_cap          1083 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->rl_caps.min_unit = size >> 14;
dev_cap          1086 drivers/net/ethernet/mellanox/mlx4/fw.c 	MLX4_GET(dev_cap->health_buffer_addrs, outbox,
dev_cap          1091 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_UPDATE_QP;
dev_cap          1093 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_UPDATE_QP_SRC_CHECK_LB;
dev_cap          1095 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_LB_SRC_CHK;
dev_cap          1097 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_VLAN_CONTROL;
dev_cap          1099 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_FSM;
dev_cap          1101 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_80_VFS;
dev_cap          1103 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_SW_CQ_INIT;
dev_cap          1105 drivers/net/ethernet/mellanox/mlx4/fw.c 	for (i = 1; i <= dev_cap->num_ports; i++) {
dev_cap          1106 drivers/net/ethernet/mellanox/mlx4/fw.c 		err = mlx4_QUERY_PORT(dev, i, dev_cap->port_cap + i);
dev_cap          1116 drivers/net/ethernet/mellanox/mlx4/fw.c 	if (dev_cap->num_sys_eqs == 0)
dev_cap          1117 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->reserved_eqs = max(dev_cap->reserved_uars * 4,
dev_cap          1118 drivers/net/ethernet/mellanox/mlx4/fw.c 					    dev_cap->reserved_eqs);
dev_cap          1120 drivers/net/ethernet/mellanox/mlx4/fw.c 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_SYS_EQS;
dev_cap          1127 drivers/net/ethernet/mellanox/mlx4/fw.c void mlx4_dev_cap_dump(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
dev_cap          1129 drivers/net/ethernet/mellanox/mlx4/fw.c 	if (dev_cap->bf_reg_size > 0)
dev_cap          1131 drivers/net/ethernet/mellanox/mlx4/fw.c 			 dev_cap->bf_reg_size, dev_cap->bf_regs_per_page);
dev_cap          1136 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->bmme_flags, dev_cap->reserved_lkey);
dev_cap          1138 drivers/net/ethernet/mellanox/mlx4/fw.c 		 (unsigned long long) dev_cap->max_icm_sz >> 20);
dev_cap          1140 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->max_qps, dev_cap->reserved_qps, dev_cap->qpc_entry_sz);
dev_cap          1142 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->max_srqs, dev_cap->reserved_srqs, dev_cap->srq_entry_sz);
dev_cap          1144 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->max_cqs, dev_cap->reserved_cqs, dev_cap->cqc_entry_sz);
dev_cap          1146 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->num_sys_eqs, dev_cap->max_eqs, dev_cap->reserved_eqs,
dev_cap          1147 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->eqc_entry_sz);
dev_cap          1149 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->reserved_mrws, dev_cap->reserved_mtts);
dev_cap          1151 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->max_pds, dev_cap->reserved_pds, dev_cap->reserved_uars);
dev_cap          1153 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->max_pds, dev_cap->reserved_mgms);
dev_cap          1155 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->max_cq_sz, dev_cap->max_qp_sz, dev_cap->max_srq_sz);
dev_cap          1157 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->local_ca_ack_delay, 128 << dev_cap->port_cap[1].ib_mtu,
dev_cap          1158 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->port_cap[1].max_port_width);
dev_cap          1160 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->max_sq_desc_sz, dev_cap->max_sq_sg);
dev_cap          1162 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->max_rq_desc_sz, dev_cap->max_rq_sg);
dev_cap          1163 drivers/net/ethernet/mellanox/mlx4/fw.c 	mlx4_dbg(dev, "Max GSO size: %d\n", dev_cap->max_gso_sz);
dev_cap          1164 drivers/net/ethernet/mellanox/mlx4/fw.c 	mlx4_dbg(dev, "Max counters: %d\n", dev_cap->max_counters);
dev_cap          1165 drivers/net/ethernet/mellanox/mlx4/fw.c 	mlx4_dbg(dev, "Max RSS Table size: %d\n", dev_cap->max_rss_tbl_sz);
dev_cap          1167 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->dmfs_high_rate_qpn_base);
dev_cap          1169 drivers/net/ethernet/mellanox/mlx4/fw.c 		 dev_cap->dmfs_high_rate_qpn_range);
dev_cap          1171 drivers/net/ethernet/mellanox/mlx4/fw.c 	if (dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT) {
dev_cap          1172 drivers/net/ethernet/mellanox/mlx4/fw.c 		struct mlx4_rate_limit_caps *rl_caps = &dev_cap->rl_caps;
dev_cap          1179 drivers/net/ethernet/mellanox/mlx4/fw.c 	dump_dev_cap_flags(dev, dev_cap->flags);
dev_cap          1180 drivers/net/ethernet/mellanox/mlx4/fw.c 	dump_dev_cap_flags2(dev, dev_cap->flags2);
dev_cap           229 drivers/net/ethernet/mellanox/mlx4/fw.h void mlx4_dev_cap_dump(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap);
dev_cap           230 drivers/net/ethernet/mellanox/mlx4/fw.h int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap);
dev_cap           294 drivers/net/ethernet/mellanox/mlx4/main.c 					      struct mlx4_dev_cap *dev_cap)
dev_cap           303 drivers/net/ethernet/mellanox/mlx4/main.c 		      dev_cap->reserved_uars /
dev_cap           343 drivers/net/ethernet/mellanox/mlx4/main.c static int mlx4_query_func(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
dev_cap           354 drivers/net/ethernet/mellanox/mlx4/main.c 		dev_cap->max_eqs = func.max_eq;
dev_cap           355 drivers/net/ethernet/mellanox/mlx4/main.c 		dev_cap->reserved_eqs = func.rsvd_eqs;
dev_cap           356 drivers/net/ethernet/mellanox/mlx4/main.c 		dev_cap->reserved_uars = func.rsvd_uars;
dev_cap           364 drivers/net/ethernet/mellanox/mlx4/main.c 	struct mlx4_caps *dev_cap = &dev->caps;
dev_cap           367 drivers/net/ethernet/mellanox/mlx4/main.c 	if (!(dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_EQE_STRIDE) ||
dev_cap           368 drivers/net/ethernet/mellanox/mlx4/main.c 	    !(dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_CQE_STRIDE))
dev_cap           374 drivers/net/ethernet/mellanox/mlx4/main.c 	if (!(dev_cap->flags & MLX4_DEV_CAP_FLAG_64B_EQE) ||
dev_cap           375 drivers/net/ethernet/mellanox/mlx4/main.c 	    !(dev_cap->flags & MLX4_DEV_CAP_FLAG_64B_CQE)) {
dev_cap           376 drivers/net/ethernet/mellanox/mlx4/main.c 		dev_cap->flags2 &= ~MLX4_DEV_CAP_FLAG2_CQE_STRIDE;
dev_cap           377 drivers/net/ethernet/mellanox/mlx4/main.c 		dev_cap->flags2 &= ~MLX4_DEV_CAP_FLAG2_EQE_STRIDE;
dev_cap           384 drivers/net/ethernet/mellanox/mlx4/main.c 		dev_cap->flags &= ~MLX4_DEV_CAP_FLAG_64B_CQE;
dev_cap           385 drivers/net/ethernet/mellanox/mlx4/main.c 		dev_cap->flags &= ~MLX4_DEV_CAP_FLAG_64B_EQE;
dev_cap           388 drivers/net/ethernet/mellanox/mlx4/main.c 			dev_cap->function_caps |= MLX4_FUNC_CAP_EQE_CQE_STRIDE;
dev_cap           392 drivers/net/ethernet/mellanox/mlx4/main.c 		dev_cap->flags2 &= ~MLX4_DEV_CAP_FLAG2_CQE_STRIDE;
dev_cap           393 drivers/net/ethernet/mellanox/mlx4/main.c 		dev_cap->flags2 &= ~MLX4_DEV_CAP_FLAG2_EQE_STRIDE;
dev_cap           457 drivers/net/ethernet/mellanox/mlx4/main.c static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
dev_cap           462 drivers/net/ethernet/mellanox/mlx4/main.c 	err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
dev_cap           467 drivers/net/ethernet/mellanox/mlx4/main.c 	mlx4_dev_cap_dump(dev, dev_cap);
dev_cap           469 drivers/net/ethernet/mellanox/mlx4/main.c 	if (dev_cap->min_page_sz > PAGE_SIZE) {
dev_cap           471 drivers/net/ethernet/mellanox/mlx4/main.c 			 dev_cap->min_page_sz, PAGE_SIZE);
dev_cap           474 drivers/net/ethernet/mellanox/mlx4/main.c 	if (dev_cap->num_ports > MLX4_MAX_PORTS) {
dev_cap           476 drivers/net/ethernet/mellanox/mlx4/main.c 			 dev_cap->num_ports, MLX4_MAX_PORTS);
dev_cap           480 drivers/net/ethernet/mellanox/mlx4/main.c 	if (dev_cap->uar_size > pci_resource_len(dev->persist->pdev, 2)) {
dev_cap           482 drivers/net/ethernet/mellanox/mlx4/main.c 			 dev_cap->uar_size,
dev_cap           488 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.num_ports	     = dev_cap->num_ports;
dev_cap           489 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.num_sys_eqs = dev_cap->num_sys_eqs;
dev_cap           490 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->phys_caps.num_phys_eqs = dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS ?
dev_cap           494 drivers/net/ethernet/mellanox/mlx4/main.c 		err = _mlx4_dev_port(dev, i, dev_cap->port_cap + i);
dev_cap           502 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.num_uars	     = dev_cap->uar_size / PAGE_SIZE;
dev_cap           503 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
dev_cap           504 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.bf_reg_size	     = dev_cap->bf_reg_size;
dev_cap           505 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
dev_cap           506 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.max_sq_sg	     = dev_cap->max_sq_sg;
dev_cap           507 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.max_rq_sg	     = dev_cap->max_rq_sg;
dev_cap           508 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.max_wqes	     = dev_cap->max_qp_sz;
dev_cap           509 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
dev_cap           510 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.max_srq_wqes	     = dev_cap->max_srq_sz;
dev_cap           511 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.max_srq_sge	     = dev_cap->max_rq_sg - 1;
dev_cap           512 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.reserved_srqs	     = dev_cap->reserved_srqs;
dev_cap           513 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
dev_cap           514 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
dev_cap           519 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.max_cqes	     = dev_cap->max_cq_sz - 1;
dev_cap           520 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.reserved_cqs	     = dev_cap->reserved_cqs;
dev_cap           521 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.reserved_eqs	     = dev_cap->reserved_eqs;
dev_cap           522 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.reserved_mtts      = dev_cap->reserved_mtts;
dev_cap           523 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.reserved_mrws	     = dev_cap->reserved_mrws;
dev_cap           525 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.reserved_pds	     = dev_cap->reserved_pds;
dev_cap           527 drivers/net/ethernet/mellanox/mlx4/main.c 					dev_cap->reserved_xrcds : 0;
dev_cap           529 drivers/net/ethernet/mellanox/mlx4/main.c 					dev_cap->max_xrcds : 0;
dev_cap           530 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.mtt_entry_sz       = dev_cap->mtt_entry_sz;
dev_cap           532 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
dev_cap           533 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.page_size_cap	     = ~(u32) (dev_cap->min_page_sz - 1);
dev_cap           534 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.flags		     = dev_cap->flags;
dev_cap           535 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.flags2	     = dev_cap->flags2;
dev_cap           536 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.bmme_flags	     = dev_cap->bmme_flags;
dev_cap           537 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.reserved_lkey	     = dev_cap->reserved_lkey;
dev_cap           538 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
dev_cap           539 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.max_gso_sz	     = dev_cap->max_gso_sz;
dev_cap           540 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.max_rss_tbl_sz     = dev_cap->max_rss_tbl_sz;
dev_cap           541 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.wol_port[1]          = dev_cap->wol_port[1];
dev_cap           542 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.wol_port[2]          = dev_cap->wol_port[2];
dev_cap           543 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.health_buffer_addrs  = dev_cap->health_buffer_addrs;
dev_cap           555 drivers/net/ethernet/mellanox/mlx4/main.c 		mlx4_set_num_reserved_uars(dev, dev_cap);
dev_cap           635 drivers/net/ethernet/mellanox/mlx4/main.c 		if (dev->caps.log_num_macs > dev_cap->port_cap[i].log_max_macs) {
dev_cap           636 drivers/net/ethernet/mellanox/mlx4/main.c 			dev->caps.log_num_macs = dev_cap->port_cap[i].log_max_macs;
dev_cap           640 drivers/net/ethernet/mellanox/mlx4/main.c 		if (dev->caps.log_num_vlans > dev_cap->port_cap[i].log_max_vlans) {
dev_cap           641 drivers/net/ethernet/mellanox/mlx4/main.c 			dev->caps.log_num_vlans = dev_cap->port_cap[i].log_max_vlans;
dev_cap           655 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.max_counters = dev_cap->max_counters;
dev_cap           657 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps;
dev_cap           665 drivers/net/ethernet/mellanox/mlx4/main.c 	if (dev_cap->dmfs_high_rate_qpn_base > 0 &&
dev_cap           667 drivers/net/ethernet/mellanox/mlx4/main.c 		dev->caps.dmfs_high_rate_qpn_base = dev_cap->dmfs_high_rate_qpn_base;
dev_cap           672 drivers/net/ethernet/mellanox/mlx4/main.c 	if (dev_cap->dmfs_high_rate_qpn_range > 0 &&
dev_cap           674 drivers/net/ethernet/mellanox/mlx4/main.c 		dev->caps.dmfs_high_rate_qpn_range = dev_cap->dmfs_high_rate_qpn_range;
dev_cap           684 drivers/net/ethernet/mellanox/mlx4/main.c 	dev->caps.rl_caps = dev_cap->rl_caps;
dev_cap           697 drivers/net/ethernet/mellanox/mlx4/main.c 		if (dev_cap->flags &
dev_cap           704 drivers/net/ethernet/mellanox/mlx4/main.c 		if (dev_cap->flags2 &
dev_cap           708 drivers/net/ethernet/mellanox/mlx4/main.c 			dev_cap->flags2 &= ~MLX4_DEV_CAP_FLAG2_CQE_STRIDE;
dev_cap           709 drivers/net/ethernet/mellanox/mlx4/main.c 			dev_cap->flags2 &= ~MLX4_DEV_CAP_FLAG2_EQE_STRIDE;
dev_cap           842 drivers/net/ethernet/mellanox/mlx4/main.c 				       struct mlx4_dev_cap *dev_cap,
dev_cap           847 drivers/net/ethernet/mellanox/mlx4/main.c 		dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry;
dev_cap           849 drivers/net/ethernet/mellanox/mlx4/main.c 			dev_cap->fs_log_max_ucast_qp_range_size;
dev_cap           910 drivers/net/ethernet/mellanox/mlx4/main.c 	struct mlx4_dev_cap	   *dev_cap = NULL;
dev_cap           916 drivers/net/ethernet/mellanox/mlx4/main.c 	dev_cap = kzalloc(sizeof(*dev_cap), GFP_KERNEL);
dev_cap           917 drivers/net/ethernet/mellanox/mlx4/main.c 	if (!hca_param || !func_cap || !dev_cap) {
dev_cap           941 drivers/net/ethernet/mellanox/mlx4/main.c 	err = mlx4_dev_cap(dev, dev_cap);
dev_cap           972 drivers/net/ethernet/mellanox/mlx4/main.c 	mlx4_set_num_reserved_uars(dev, dev_cap);
dev_cap          1072 drivers/net/ethernet/mellanox/mlx4/main.c 	slave_adjust_steering_mode(dev, dev_cap, hca_param);
dev_cap          1089 drivers/net/ethernet/mellanox/mlx4/main.c 	kfree(dev_cap);
dev_cap          1641 drivers/net/ethernet/mellanox/mlx4/main.c static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
dev_cap          1672 drivers/net/ethernet/mellanox/mlx4/main.c 	err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
dev_cap          1681 drivers/net/ethernet/mellanox/mlx4/main.c 				  init_hca->eqc_base, dev_cap->eqc_entry_sz,
dev_cap          1711 drivers/net/ethernet/mellanox/mlx4/main.c 				  dev_cap->dmpt_entry_sz,
dev_cap          1721 drivers/net/ethernet/mellanox/mlx4/main.c 				  dev_cap->qpc_entry_sz,
dev_cap          1732 drivers/net/ethernet/mellanox/mlx4/main.c 				  dev_cap->aux_entry_sz,
dev_cap          1743 drivers/net/ethernet/mellanox/mlx4/main.c 				  dev_cap->altc_entry_sz,
dev_cap          1754 drivers/net/ethernet/mellanox/mlx4/main.c 				  dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
dev_cap          1765 drivers/net/ethernet/mellanox/mlx4/main.c 				  dev_cap->cqc_entry_sz,
dev_cap          1775 drivers/net/ethernet/mellanox/mlx4/main.c 				  dev_cap->srq_entry_sz,
dev_cap          2166 drivers/net/ethernet/mellanox/mlx4/main.c 				 struct mlx4_dev_cap *dev_cap)
dev_cap          2180 drivers/net/ethernet/mellanox/mlx4/main.c 	    dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_FS_EN &&
dev_cap          2182 drivers/net/ethernet/mellanox/mlx4/main.c 	     (dev_cap->fs_max_num_qp_per_entry >=
dev_cap          2184 drivers/net/ethernet/mellanox/mlx4/main.c 	    choose_log_fs_mgm_entry_size(dev_cap->fs_max_num_qp_per_entry) >=
dev_cap          2187 drivers/net/ethernet/mellanox/mlx4/main.c 			choose_log_fs_mgm_entry_size(dev_cap->fs_max_num_qp_per_entry);
dev_cap          2189 drivers/net/ethernet/mellanox/mlx4/main.c 		dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry;
dev_cap          2191 drivers/net/ethernet/mellanox/mlx4/main.c 			dev_cap->fs_log_max_ucast_qp_range_size;
dev_cap          2219 drivers/net/ethernet/mellanox/mlx4/main.c 				       struct mlx4_dev_cap *dev_cap)
dev_cap          2222 drivers/net/ethernet/mellanox/mlx4/main.c 	    dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_VXLAN_OFFLOADS)
dev_cap          2295 drivers/net/ethernet/mellanox/mlx4/main.c 	struct mlx4_dev_cap	  *dev_cap = NULL;
dev_cap          2303 drivers/net/ethernet/mellanox/mlx4/main.c 		dev_cap = kzalloc(sizeof(*dev_cap), GFP_KERNEL);
dev_cap          2306 drivers/net/ethernet/mellanox/mlx4/main.c 		if (!dev_cap || !init_hca) {
dev_cap          2311 drivers/net/ethernet/mellanox/mlx4/main.c 		err = mlx4_dev_cap(dev, dev_cap);
dev_cap          2317 drivers/net/ethernet/mellanox/mlx4/main.c 		choose_steering_mode(dev, dev_cap);
dev_cap          2318 drivers/net/ethernet/mellanox/mlx4/main.c 		choose_tunnel_offload_mode(dev, dev_cap);
dev_cap          2341 drivers/net/ethernet/mellanox/mlx4/main.c 		icm_size = mlx4_make_profile(dev, &profile, dev_cap,
dev_cap          2364 drivers/net/ethernet/mellanox/mlx4/main.c 		err = mlx4_init_icm(dev, dev_cap, init_hca, icm_size);
dev_cap          2374 drivers/net/ethernet/mellanox/mlx4/main.c 		if (dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS) {
dev_cap          2375 drivers/net/ethernet/mellanox/mlx4/main.c 			err = mlx4_query_func(dev, dev_cap);
dev_cap          2380 drivers/net/ethernet/mellanox/mlx4/main.c 				dev->caps.num_eqs = dev_cap->max_eqs;
dev_cap          2381 drivers/net/ethernet/mellanox/mlx4/main.c 				dev->caps.reserved_eqs = dev_cap->reserved_eqs;
dev_cap          2382 drivers/net/ethernet/mellanox/mlx4/main.c 				dev->caps.reserved_uars = dev_cap->reserved_uars;
dev_cap          2494 drivers/net/ethernet/mellanox/mlx4/main.c 	kfree(dev_cap);
dev_cap          3275 drivers/net/ethernet/mellanox/mlx4/main.c static int mlx4_check_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
dev_cap          3280 drivers/net/ethernet/mellanox/mlx4/main.c 	if (!(dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_80_VFS) &&
dev_cap          3326 drivers/net/ethernet/mellanox/mlx4/main.c 	struct mlx4_dev_cap *dev_cap = NULL;
dev_cap          3425 drivers/net/ethernet/mellanox/mlx4/main.c 		if (!dev_cap) {
dev_cap          3426 drivers/net/ethernet/mellanox/mlx4/main.c 			dev_cap = kzalloc(sizeof(*dev_cap), GFP_KERNEL);
dev_cap          3428 drivers/net/ethernet/mellanox/mlx4/main.c 			if (!dev_cap) {
dev_cap          3433 drivers/net/ethernet/mellanox/mlx4/main.c 			err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
dev_cap          3439 drivers/net/ethernet/mellanox/mlx4/main.c 			if (mlx4_check_dev_cap(dev, dev_cap, nvfs))
dev_cap          3442 drivers/net/ethernet/mellanox/mlx4/main.c 			if (!(dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS)) {
dev_cap          3467 drivers/net/ethernet/mellanox/mlx4/main.c 			memset(dev_cap, 0, sizeof(*dev_cap));
dev_cap          3468 drivers/net/ethernet/mellanox/mlx4/main.c 			err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
dev_cap          3474 drivers/net/ethernet/mellanox/mlx4/main.c 			if (mlx4_check_dev_cap(dev, dev_cap, nvfs))
dev_cap          3502 drivers/net/ethernet/mellanox/mlx4/main.c 	if (mlx4_is_master(dev) && (dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS)) {
dev_cap          3639 drivers/net/ethernet/mellanox/mlx4/main.c 	kfree(dev_cap);
dev_cap          3707 drivers/net/ethernet/mellanox/mlx4/main.c 	kfree(dev_cap);
dev_cap          1057 drivers/net/ethernet/mellanox/mlx4/mlx4.h 		      struct mlx4_dev_cap *dev_cap,
dev_cap            71 drivers/net/ethernet/mellanox/mlx4/profile.c 		      struct mlx4_dev_cap *dev_cap,
dev_cap           111 drivers/net/ethernet/mellanox/mlx4/profile.c 	profile[MLX4_RES_QP].size     = dev_cap->qpc_entry_sz;
dev_cap           112 drivers/net/ethernet/mellanox/mlx4/profile.c 	profile[MLX4_RES_RDMARC].size = dev_cap->rdmarc_entry_sz;
dev_cap           113 drivers/net/ethernet/mellanox/mlx4/profile.c 	profile[MLX4_RES_ALTC].size   = dev_cap->altc_entry_sz;
dev_cap           114 drivers/net/ethernet/mellanox/mlx4/profile.c 	profile[MLX4_RES_AUXC].size   = dev_cap->aux_entry_sz;
dev_cap           115 drivers/net/ethernet/mellanox/mlx4/profile.c 	profile[MLX4_RES_SRQ].size    = dev_cap->srq_entry_sz;
dev_cap           116 drivers/net/ethernet/mellanox/mlx4/profile.c 	profile[MLX4_RES_CQ].size     = dev_cap->cqc_entry_sz;
dev_cap           117 drivers/net/ethernet/mellanox/mlx4/profile.c 	profile[MLX4_RES_EQ].size     = dev_cap->eqc_entry_sz;
dev_cap           118 drivers/net/ethernet/mellanox/mlx4/profile.c 	profile[MLX4_RES_DMPT].size   = dev_cap->dmpt_entry_sz;
dev_cap           119 drivers/net/ethernet/mellanox/mlx4/profile.c 	profile[MLX4_RES_CMPT].size   = dev_cap->cmpt_entry_sz;
dev_cap           120 drivers/net/ethernet/mellanox/mlx4/profile.c 	profile[MLX4_RES_MTT].size    = dev_cap->mtt_entry_sz;
dev_cap           130 drivers/net/ethernet/mellanox/mlx4/profile.c 					min_t(unsigned, dev_cap->max_eqs, MAX_MSIX);
dev_cap           162 drivers/net/ethernet/mellanox/mlx4/profile.c 		if (total_size > dev_cap->max_icm_sz) {
dev_cap           165 drivers/net/ethernet/mellanox/mlx4/profile.c 				 (unsigned long long) dev_cap->max_icm_sz);
dev_cap           215 drivers/net/ethernet/mellanox/mlx4/profile.c 			if (dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS) {
dev_cap           218 drivers/net/ethernet/mellanox/mlx4/profile.c 				init_hca->num_sys_eqs = dev_cap->num_sys_eqs;
dev_cap           222 drivers/net/ethernet/mellanox/mlx4/profile.c 								      dev_cap->max_eqs,
dev_cap            52 include/linux/mlx4/device.h #define MLX4_IS_LEGACY_EQ_MODE(dev_cap) ((dev_cap).num_comp_vectors < \
dev_cap            53 include/linux/mlx4/device.h 					 (dev_cap).num_ports * MIN_MSIX_P_PORT)