dev_base 658 arch/powerpc/sysdev/fsl_pci.c u32 dev_base; dev_base 708 arch/powerpc/sysdev/fsl_pci.c u32 dev_base = bus->number << 24 | devfn << 16; dev_base 721 arch/powerpc/sysdev/fsl_pci.c if (pcie->dev_base == dev_base) dev_base 724 arch/powerpc/sysdev/fsl_pci.c out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAL, dev_base); dev_base 726 arch/powerpc/sysdev/fsl_pci.c pcie->dev_base = dev_base; dev_base 11 arch/x86/include/asm/amd_nb.h u8 dev_base; dev_base 309 arch/x86/kernel/aperture_64.c int dev_base, dev_limit; dev_base 312 arch/x86/kernel/aperture_64.c dev_base = amd_nb_bus_dev_ranges[i].dev_base; dev_base 315 arch/x86/kernel/aperture_64.c for (slot = dev_base; slot < dev_limit; slot++) { dev_base 365 arch/x86/kernel/aperture_64.c int dev_base, dev_limit; dev_base 368 arch/x86/kernel/aperture_64.c dev_base = amd_nb_bus_dev_ranges[i].dev_base; dev_base 371 arch/x86/kernel/aperture_64.c for (slot = dev_base; slot < dev_limit; slot++) { dev_base 409 arch/x86/kernel/aperture_64.c int dev_base, dev_limit; dev_base 413 arch/x86/kernel/aperture_64.c dev_base = amd_nb_bus_dev_ranges[i].dev_base; dev_base 416 arch/x86/kernel/aperture_64.c for (slot = dev_base; slot < dev_limit; slot++) { dev_base 533 arch/x86/kernel/aperture_64.c int bus, dev_base, dev_limit; dev_base 542 arch/x86/kernel/aperture_64.c dev_base = amd_nb_bus_dev_ranges[i].dev_base; dev_base 544 arch/x86/kernel/aperture_64.c for (slot = dev_base; slot < dev_limit; slot++) { dev_base 351 arch/x86/pci/amd_bus.c u8 slot = amd_nb_bus_dev_ranges[i].dev_base; dev_base 41 arch/x86/pci/mmconfig_32.c u32 dev_base = base | PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12); dev_base 43 arch/x86/pci/mmconfig_32.c if (dev_base != mmcfg_last_accessed_device || dev_base 45 arch/x86/pci/mmconfig_32.c mmcfg_last_accessed_device = dev_base; dev_base 47 arch/x86/pci/mmconfig_32.c set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);