AUX_ARB_CONTROL    67 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 	REG_UPDATE(AUX_ARB_CONTROL, AUX_SW_DONE_USING_AUX_REG, 1);
AUX_ARB_CONTROL    78 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 	uint32_t value = REG_READ(AUX_ARB_CONTROL);
AUX_ARB_CONTROL    81 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 			AUX_ARB_CONTROL,
AUX_ARB_CONTROL    91 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 	uint32_t value = REG_READ(AUX_ARB_CONTROL);
AUX_ARB_CONTROL    94 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 			AUX_ARB_CONTROL,
AUX_ARB_CONTROL   142 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 	REG_UPDATE(AUX_ARB_CONTROL, AUX_SW_USE_AUX_REG_REQ, 1);
AUX_ARB_CONTROL   144 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 	value = REG_READ(AUX_ARB_CONTROL);
AUX_ARB_CONTROL   147 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 			AUX_ARB_CONTROL,
AUX_ARB_CONTROL    35 drivers/gpu/drm/amd/display/dc/dce/dce_aux.h 	SRI(AUX_ARB_CONTROL, DP_AUX, id), \
AUX_ARB_CONTROL    44 drivers/gpu/drm/amd/display/dc/dce/dce_aux.h 	SRI(AUX_ARB_CONTROL, DP_AUX, id), \
AUX_ARB_CONTROL    54 drivers/gpu/drm/amd/display/dc/dce/dce_aux.h 	uint32_t AUX_ARB_CONTROL;