destination_lines_to_request_row_in_vblank 1711 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->destination_lines_to_request_row_in_vblank[k] =dcn_bw_floor2(4.0 * (v->time_for_fetching_row_in_vblank / (v->htotal[k] / v->pixel_clock[k]) + 0.125), 1.0) / 4;
destination_lines_to_request_row_in_vblank 1712 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->lines_to_request_prefetch_pixel_data = v->destination_lines_for_prefetch[k] - v->destination_lines_to_request_vm_inv_blank[k] - v->destination_lines_to_request_row_in_vblank[k];
destination_lines_to_request_row_in_vblank 1751 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->max_rd_bandwidth = v->max_rd_bandwidth +dcn_bw_max2(v->meta_pte_bytes_frame[k] / (v->destination_lines_to_request_vm_inv_blank[k] * v->htotal[k] / v->pixel_clock[k]), (v->meta_row_byte[k] + v->pixel_pte_bytes_per_row[k]) / (v->destination_lines_to_request_row_in_vblank[k] * v->htotal[k] / v->pixel_clock[k]));
destination_lines_to_request_row_in_vblank  397 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h 	float destination_lines_to_request_row_in_vblank[number_of_planes_minus_one + 1];