DSC_DEBUG_CONTROL  521 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	REG_SET(DSC_DEBUG_CONTROL, 0,
DSC_DEBUG_CONTROL   37 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	SRI(DSC_DEBUG_CONTROL, DSC_TOP, id),\
DSC_DEBUG_CONTROL  462 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	uint32_t DSC_DEBUG_CONTROL;