dep_table 286 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c ATOM_PPLIB_Clock_Voltage_Dependency_Table *dep_table; dep_table 331 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c dep_table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *) dep_table 335 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c dep_table); dep_table 342 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c dep_table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *) dep_table 346 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c dep_table); dep_table 353 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c dep_table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *) dep_table 357 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c dep_table); dep_table 364 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c dep_table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *) dep_table 368 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c dep_table); dep_table 703 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c dep_table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *) dep_table 708 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c dep_table); dep_table 381 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c struct phm_clock_voltage_dependency_table *dep_table; dep_table 387 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c dep_table = kzalloc(table_size, GFP_KERNEL); dep_table 388 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c if (NULL == dep_table) dep_table 391 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c dep_table->count = (unsigned long)table->ucNumEntries; dep_table 393 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c for (i = 0; i < dep_table->count; i++) { dep_table 394 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c dep_table->entries[i].clk = dep_table 397 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c dep_table->entries[i].v = dep_table 401 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c *ptable = dep_table; dep_table 900 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table; dep_table 922 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c dep_table = table_info->vdd_dep_on_mclk; dep_table 925 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 926 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { dep_table 932 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c dep_table = table_info->vdd_dep_on_sclk; dep_table 934 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 935 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { dep_table 259 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c struct phm_clock_voltage_dependency_table *dep_table = dep_table 262 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (dep_table->count > 0) { dep_table 263 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c table->sclk = dep_table->entries[dep_table->count-1].clk; dep_table 265 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c (uint16_t)dep_table->entries[dep_table->count-1].v); dep_table 248 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c phm_ppt_v1_clock_voltage_dependency_table *dep_table) dep_table 253 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PP_ASSERT_WITH_CODE((0 != dep_table->count), dep_table 261 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c vol_table->count = dep_table->count; dep_table 263 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c for (i = 0; i < dep_table->count; i++) { dep_table 264 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c vol_table->entries[i].value = dep_table->entries[i].mvdd; dep_table 276 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c phm_ppt_v1_clock_voltage_dependency_table *dep_table) dep_table 281 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PP_ASSERT_WITH_CODE((0 != dep_table->count), dep_table 289 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c vol_table->count = dep_table->count; dep_table 291 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c for (i = 0; i < dep_table->count; i++) { dep_table 292 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c vol_table->entries[i].value = dep_table->entries[i].vddci; dep_table 680 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table) dep_table 687 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c dep_table->count = allowed_dep_table->count; dep_table 688 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c for (i=0; i<dep_table->count; i++) { dep_table 689 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c dep_table->entries[i].clk = allowed_dep_table->entries[i].clk; dep_table 690 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c dep_table->entries[i].vddInd = allowed_dep_table->entries[i].vddInd; dep_table 691 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c dep_table->entries[i].vdd_offset = allowed_dep_table->entries[i].vdd_offset; dep_table 692 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c dep_table->entries[i].vddc = allowed_dep_table->entries[i].vddc; dep_table 693 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c dep_table->entries[i].vddgfx = allowed_dep_table->entries[i].vddgfx; dep_table 694 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c dep_table->entries[i].vddci = allowed_dep_table->entries[i].vddci; dep_table 695 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c dep_table->entries[i].mvdd = allowed_dep_table->entries[i].mvdd; dep_table 696 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c dep_table->entries[i].phases = allowed_dep_table->entries[i].phases; dep_table 697 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c dep_table->entries[i].cks_enable = allowed_dep_table->entries[i].cks_enable; dep_table 698 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c dep_table->entries[i].cks_voffset = allowed_dep_table->entries[i].cks_voffset; dep_table 76 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h extern int phm_get_svi2_mvdd_voltage_table(struct pp_atomctrl_voltage_table *vol_table, phm_ppt_v1_clock_voltage_dependency_table *dep_table); dep_table 77 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h extern int phm_get_svi2_vddci_voltage_table(struct pp_atomctrl_voltage_table *vol_table, phm_ppt_v1_clock_voltage_dependency_table *dep_table); dep_table 119 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h struct phm_ppt_v1_clock_voltage_dependency_table *dep_table); dep_table 309 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table[3]; dep_table 329 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table[0] = table_info->vdd_dep_on_sclk; dep_table 330 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table[1] = table_info->vdd_dep_on_mclk; dep_table 331 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table[2] = table_info->vdd_dep_on_socclk; dep_table 337 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c smu_get_voltage_dependency_table_ppt_v1(dep_table[i], od_table[i]); dep_table 340 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c odn_table->max_vddc = dep_table[0]->entries[dep_table[0]->count - 1].vddc; dep_table 342 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c odn_table->min_vddc = dep_table[0]->entries[0].vddc; dep_table 1050 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c phm_ppt_v1_clock_voltage_dependency_table *dep_table, dep_table 1055 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c PP_ASSERT_WITH_CODE(dep_table->count, dep_table 1061 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vol_table->count = dep_table->count; dep_table 1064 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vol_table->entries[i].value = dep_table->entries[i].mvdd; dep_table 1077 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c phm_ppt_v1_clock_voltage_dependency_table *dep_table, dep_table 1082 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c PP_ASSERT_WITH_CODE(dep_table->count, dep_table 1088 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vol_table->count = dep_table->count; dep_table 1090 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 1091 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vol_table->entries[i].value = dep_table->entries[i].vddci; dep_table 1103 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c phm_ppt_v1_clock_voltage_dependency_table *dep_table, dep_table 1108 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c PP_ASSERT_WITH_CODE(dep_table->count, dep_table 1114 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vol_table->count = dep_table->count; dep_table 1117 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vol_table->entries[i].value = dep_table->entries[i].vddc; dep_table 1225 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table) dep_table 1231 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 1233 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table->entries[i].clk) { dep_table 1235 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table->entries[i].clk; dep_table 1860 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table; dep_table 1867 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_dcefclk; dep_table 1870 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_dispclk; dep_table 1873 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_pixclk; dep_table 1876 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_phyclk; dep_table 1882 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c PP_ASSERT_WITH_CODE(dep_table->count <= NUM_DSPCLK_LEVELS, dep_table 1886 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 1887 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c clk = (uint16_t)(dep_table->entries[i].clk / 100); dep_table 1889 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c entries[dep_table->entries[i].vddInd].us_vdd; dep_table 1927 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_mm_clock_voltage_dependency_table *dep_table = dep_table 1940 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 1941 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (dep_table->entries[i].eclk == eclock) dep_table 1942 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c *current_soc_vol = dep_table->entries[i].vddcInd; dep_table 2021 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_mm_clock_voltage_dependency_table *dep_table = dep_table 2062 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 2063 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (dep_table->entries[i].vclk == dep_table 2065 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table->entries[i].dclk == dep_table 2068 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table->entries[i].vddcInd; dep_table 2075 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c pp_table->UvdDpmVoltageIndex[i] = dep_table->entries[j].vddcInd; dep_table 2088 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table = dep_table 2092 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 2093 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c pp_table->CksEnable[i] = dep_table->entries[i].cks_enable; dep_table 2094 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c pp_table->CksVidOffset[i] = (uint8_t)(dep_table->entries[i].cks_voffset dep_table 2107 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table = dep_table 2175 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) dep_table 2177 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c convert_to_vid((uint8_t)(dep_table->entries[i].sclk_offset)); dep_table 2461 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table; dep_table 2465 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_mclk; dep_table 2468 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 2469 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { dep_table 2475 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_sclk; dep_table 2477 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 2478 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { dep_table 4213 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table = dep_table 4218 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 4219 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (dep_table->entries[i].clk) { dep_table 4221 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table->entries[i].clk * 10; dep_table 4233 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table = dep_table 4239 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 4240 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (dep_table->entries[i].clk) { dep_table 4243 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table->entries[i].clk * 10; dep_table 4245 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table->entries[i].clk; dep_table 4259 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table = dep_table 4263 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 4264 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c clocks->data[i].clocks_in_khz = dep_table->entries[i].clk * 10; dep_table 4275 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table = dep_table 4279 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 4280 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c clocks->data[i].clocks_in_khz = dep_table->entries[i].clk * 10; dep_table 4316 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table; dep_table 4321 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_mclk; dep_table 4324 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_dcefclk; dep_table 4327 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_dispclk; dep_table 4330 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_pixclk; dep_table 4333 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_phyclk; dep_table 4339 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 4340 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c clocks->data[i].clocks_in_khz = dep_table->entries[i].clk * 10; dep_table 4342 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c entries[dep_table->entries[i].vddInd].us_vdd); dep_table 4346 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (i < dep_table->count) dep_table 5089 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table = table_info->vdd_dep_on_socclk; dep_table 5120 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (i = 0; i < dep_table->count; i++) { dep_table 5121 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (dep_table->entries[i].vddInd == podn_vdd_dep->entries[podn_vdd_dep->count-1].vddInd && dep_table 5122 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table->entries[i].clk < podn_vdd_dep->entries[podn_vdd_dep->count-1].clk) { dep_table 5124 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (; (i < dep_table->count) && dep_table 5125 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c (dep_table->entries[i].clk < podn_vdd_dep->entries[podn_vdd_dep->count - 1].clk); i++) { dep_table 5131 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dpm_table->dpm_levels[i].value = dep_table->entries[i].clk; dep_table 5132 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c podn_vdd_dep_on_socclk->entries[i].vddc = dep_table->entries[i].vddc; dep_table 5133 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c podn_vdd_dep_on_socclk->entries[i].vddInd = dep_table->entries[i].vddInd; dep_table 5134 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c podn_vdd_dep_on_socclk->entries[i].clk = dep_table->entries[i].clk; dep_table 355 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table, dep_table 365 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c if (dep_table->count == 0) dep_table 368 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c for (i = 0; i < dep_table->count; i++) { dep_table 370 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c if (dep_table->entries[i].clk >= clock) { dep_table 371 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c *voltage |= (dep_table->entries[i].vddc * dep_table 376 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c else if (dep_table->entries[i].vddci) dep_table 377 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c *voltage |= (dep_table->entries[i].vddci * dep_table 381 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c (dep_table->entries[i].vddc - dep_table 389 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c else if (dep_table->entries[i].mvdd) dep_table 390 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c *mvdd = (uint32_t) dep_table->entries[i].mvdd * dep_table 399 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; dep_table 404 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c else if (dep_table->entries[i-1].vddci) { dep_table 406 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c (dep_table->entries[i].vddc - dep_table 413 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c else if (dep_table->entries[i].mvdd) dep_table 414 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c *mvdd = (uint32_t) dep_table->entries[i - 1].mvdd * VOLTAGE_SCALE; dep_table 353 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table, dep_table 363 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c if (dep_table->count == 0) dep_table 366 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c for (i = 0; i < dep_table->count; i++) { dep_table 368 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c if (dep_table->entries[i].clk >= clock) { dep_table 369 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c *voltage |= (dep_table->entries[i].vddc * dep_table 374 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c else if (dep_table->entries[i].vddci) dep_table 375 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c *voltage |= (dep_table->entries[i].vddci * dep_table 379 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (dep_table->entries[i].vddc - dep_table 387 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c else if (dep_table->entries[i].mvdd) dep_table 388 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c *mvdd = (uint32_t) dep_table->entries[i].mvdd * dep_table 397 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; dep_table 402 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c else if (dep_table->entries[i-1].vddci) { dep_table 404 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (dep_table->entries[i].vddc - dep_table 411 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c else if (dep_table->entries[i].mvdd) dep_table 412 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c *mvdd = (uint32_t) dep_table->entries[i - 1].mvdd * VOLTAGE_SCALE; dep_table 600 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table, dep_table 610 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c if (dep_table->count == 0) dep_table 613 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c for (i = 0; i < dep_table->count; i++) { dep_table 615 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c if (dep_table->entries[i].clk >= clock) { dep_table 616 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c *voltage |= (dep_table->entries[i].vddc * dep_table 621 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c else if (dep_table->entries[i].vddci) dep_table 622 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c *voltage |= (dep_table->entries[i].vddci * dep_table 626 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c (dep_table->entries[i].vddc - dep_table 634 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c else if (dep_table->entries[i].mvdd) dep_table 635 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c *mvdd = (uint32_t) dep_table->entries[i].mvdd * dep_table 644 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; dep_table 646 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c (dep_table->entries[i - 1].vddc - dep_table 652 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c else if (dep_table->entries[i - 1].vddci) dep_table 653 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c *voltage |= (dep_table->entries[i - 1].vddci * dep_table 660 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c else if (dep_table->entries[i].mvdd) dep_table 661 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c *mvdd = (uint32_t) dep_table->entries[i - 1].mvdd * VOLTAGE_SCALE; dep_table 878 drivers/gpu/drm/radeon/r600_dpm.c ATOM_PPLIB_Clock_Voltage_Dependency_Table *dep_table; dep_table 923 drivers/gpu/drm/radeon/r600_dpm.c dep_table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *) dep_table 927 drivers/gpu/drm/radeon/r600_dpm.c dep_table); dep_table 932 drivers/gpu/drm/radeon/r600_dpm.c dep_table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *) dep_table 936 drivers/gpu/drm/radeon/r600_dpm.c dep_table); dep_table 943 drivers/gpu/drm/radeon/r600_dpm.c dep_table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *) dep_table 947 drivers/gpu/drm/radeon/r600_dpm.c dep_table); dep_table 955 drivers/gpu/drm/radeon/r600_dpm.c dep_table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *) dep_table 959 drivers/gpu/drm/radeon/r600_dpm.c dep_table);