dep_mclk_table    762 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table;
dep_mclk_table    768 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	dep_mclk_table = table_info->vdd_dep_on_mclk;
dep_mclk_table    777 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	PP_ASSERT_WITH_CODE(dep_mclk_table != NULL,
dep_mclk_table    780 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	PP_ASSERT_WITH_CODE(dep_mclk_table->count >= 1,
dep_mclk_table    802 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	for (i = 0; i < dep_mclk_table->count; i++) {
dep_mclk_table    805 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 						dep_mclk_table->entries[i].clk) {
dep_mclk_table    807 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 							dep_mclk_table->entries[i].clk;
dep_mclk_table    815 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		hwmgr->platform_descriptor.overdriveLimit.memoryClock = dep_mclk_table->entries[i-1].clk;
dep_mclk_table    828 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table;
dep_mclk_table    835 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	dep_mclk_table = table_info->vdd_dep_on_mclk;
dep_mclk_table    855 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		entries[i].vddc = dep_mclk_table->entries[i].vddc;
dep_mclk_table    858 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	smu_get_voltage_dependency_table_ppt_v1(dep_mclk_table,
dep_mclk_table   2115 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table;
dep_mclk_table   2122 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		dep_mclk_table = table_info->vdd_dep_on_mclk;
dep_mclk_table   2135 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		if (lookup_table->entries[dep_mclk_table->entries[dep_mclk_table->count-1].vddInd].us_vdd >= 1000)
dep_mclk_table   2140 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 				dep_mclk_table->entries[dep_mclk_table->count-1].vddInd = (uint8_t) i;
dep_mclk_table   3224 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table =
dep_mclk_table   3238 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	if (dep_mclk_table != NULL && dep_mclk_table->count == 1) {
dep_mclk_table   3239 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		if (dep_mclk_table->entries[0].clk !=
dep_mclk_table   3243 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		if (dep_mclk_table->entries[0].vddci !=
dep_mclk_table   3367 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct phm_clock_voltage_dependency_table *dep_mclk_table =
dep_mclk_table   3386 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	if (dep_mclk_table != NULL && dep_mclk_table->count == 1) {
dep_mclk_table   3387 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		if (dep_mclk_table->entries[0].clk !=
dep_mclk_table   3391 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		if (dep_mclk_table->entries[0].v !=
dep_mclk_table   4692 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table;
dep_mclk_table   4699 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		dep_mclk_table = table_info->vdd_dep_on_mclk;
dep_mclk_table   4700 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		for (i = 0; i < dep_mclk_table->count; i++) {
dep_mclk_table   4701 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			clocks->clock[i] = dep_mclk_table->entries[i].clk * 10;
dep_mclk_table   4703 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 						dep_mclk_table->entries[i].clk);
dep_mclk_table   4705 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		clocks->count = dep_mclk_table->count;
dep_mclk_table   1302 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table =
dep_mclk_table   1329 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	PP_ASSERT_WITH_CODE(dep_mclk_table,
dep_mclk_table   1332 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	PP_ASSERT_WITH_CODE(dep_mclk_table->count >= 1,
dep_mclk_table   1358 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			dep_mclk_table);