DSCC_PPS_CONFIG5  585 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	REG_SET_2(DSCC_PPS_CONFIG5, 0,
DSCC_PPS_CONFIG5   47 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	SRI(DSCC_PPS_CONFIG5, DSCC, id),\
DSCC_PPS_CONFIG5  472 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	uint32_t DSCC_PPS_CONFIG5;