DSCC_PPS_CONFIG21  683 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	REG_SET_6(DSCC_PPS_CONFIG21, 0,
DSCC_PPS_CONFIG21   63 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	SRI(DSCC_PPS_CONFIG21, DSCC, id),\
DSCC_PPS_CONFIG21  488 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	uint32_t DSCC_PPS_CONFIG21;