DSCC_PPS_CONFIG1  160 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	REG_GET(DSCC_PPS_CONFIG1, BITS_PER_PIXEL, &s->dsc_bytes_per_pixel);
DSCC_PPS_CONFIG1  565 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	REG_SET_7(DSCC_PPS_CONFIG1, 0,
DSCC_PPS_CONFIG1   43 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	SRI(DSCC_PPS_CONFIG1, DSCC, id),\
DSCC_PPS_CONFIG1  468 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	uint32_t DSCC_PPS_CONFIG1;