DSCC_PPS_CONFIG0  555 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	REG_SET_3(DSCC_PPS_CONFIG0, 0,
DSCC_PPS_CONFIG0   42 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	SRI(DSCC_PPS_CONFIG0, DSCC, id),\
DSCC_PPS_CONFIG0  467 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	uint32_t DSCC_PPS_CONFIG0;