DSCC_MEM_PWR_STATE  232 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	DSC_SF(DSCC0_DSCC_MEM_POWER_CONTROL, DSCC_MEM_PWR_STATE, mask_sh), \
DSCC_MEM_PWR_STATE  407 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	type DSCC_MEM_PWR_STATE; \