DSCC_INTERRUPT_CONTROL_STATUS  549 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	REG_SET_4(DSCC_INTERRUPT_CONTROL_STATUS, 0,
DSCC_INTERRUPT_CONTROL_STATUS   41 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	SRI(DSCC_INTERRUPT_CONTROL_STATUS, DSCC, id),\
DSCC_INTERRUPT_CONTROL_STATUS  466 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	uint32_t DSCC_INTERRUPT_CONTROL_STATUS;