delay_val         110 drivers/i2c/busses/i2c-mpc.c 	u32 delay_val = 1000000 / i2c->real_clk + 1;
delay_val         112 drivers/i2c/busses/i2c-mpc.c 	if (delay_val < 2)
delay_val         113 drivers/i2c/busses/i2c-mpc.c 		delay_val = 2;
delay_val         120 drivers/i2c/busses/i2c-mpc.c 		udelay(delay_val << 1);
delay_val         136 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 	u32 delay_val = 0, fine_val = 0;
delay_val         142 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 		delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->tx_delay);
delay_val         143 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 		delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->tx_delay);
delay_val         144 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 		delay_val |= FIELD_PREP(ETH_DLY_TXC_INV, mac_delay->tx_inv);
delay_val         146 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 		delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay);
delay_val         147 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 		delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay);
delay_val         148 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 		delay_val |= FIELD_PREP(ETH_DLY_RXC_INV, mac_delay->rx_inv);
delay_val         162 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 			delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay);
delay_val         163 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 			delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay);
delay_val         164 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 			delay_val |= FIELD_PREP(ETH_DLY_RXC_INV, mac_delay->rx_inv);
delay_val         170 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 			delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->rx_delay);
delay_val         171 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 			delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->rx_delay);
delay_val         172 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 			delay_val |= FIELD_PREP(ETH_DLY_TXC_INV, mac_delay->rx_inv);
delay_val         187 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 		delay_val |= FIELD_PREP(ETH_DLY_GTXC_ENABLE, !!mac_delay->tx_delay);
delay_val         188 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 		delay_val |= FIELD_PREP(ETH_DLY_GTXC_STAGES, mac_delay->tx_delay);
delay_val         189 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 		delay_val |= FIELD_PREP(ETH_DLY_GTXC_INV, mac_delay->tx_inv);
delay_val         191 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 		delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay);
delay_val         192 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 		delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay);
delay_val         193 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 		delay_val |= FIELD_PREP(ETH_DLY_RXC_INV, mac_delay->rx_inv);
delay_val         199 drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c 	regmap_write(plat->peri_regmap, PERI_ETH_DLY, delay_val);