delay_num          52 drivers/clk/rockchip/clk-mmc-phase.c 	u32 delay_num = 0;
delay_num          67 drivers/clk/rockchip/clk-mmc-phase.c 		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
delay_num          68 drivers/clk/rockchip/clk-mmc-phase.c 		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
delay_num          69 drivers/clk/rockchip/clk-mmc-phase.c 		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 1000000);
delay_num          80 drivers/clk/rockchip/clk-mmc-phase.c 	u8 delay_num;
delay_num         133 drivers/clk/rockchip/clk-mmc-phase.c 	delay_num = (u8) min_t(u32, delay, 255);
delay_num         135 drivers/clk/rockchip/clk-mmc-phase.c 	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
delay_num         136 drivers/clk/rockchip/clk-mmc-phase.c 	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
delay_num         142 drivers/clk/rockchip/clk-mmc-phase.c 		clk_hw_get_name(hw), degrees, delay_num,