DSCC0_DSCC_PPS_CONFIG21  217 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	DSC_SF(DSCC0_DSCC_PPS_CONFIG21, RANGE_MIN_QP11, mask_sh), \
DSCC0_DSCC_PPS_CONFIG21  218 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	DSC_SF(DSCC0_DSCC_PPS_CONFIG21, RANGE_MAX_QP11, mask_sh), \
DSCC0_DSCC_PPS_CONFIG21  219 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	DSC_SF(DSCC0_DSCC_PPS_CONFIG21, RANGE_BPG_OFFSET11, mask_sh), \
DSCC0_DSCC_PPS_CONFIG21  220 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	DSC_SF(DSCC0_DSCC_PPS_CONFIG21, RANGE_MIN_QP12, mask_sh), \
DSCC0_DSCC_PPS_CONFIG21  221 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	DSC_SF(DSCC0_DSCC_PPS_CONFIG21, RANGE_MAX_QP12, mask_sh), \
DSCC0_DSCC_PPS_CONFIG21  222 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	DSC_SF(DSCC0_DSCC_PPS_CONFIG21, RANGE_BPG_OFFSET12, mask_sh), \