defaults 514 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 516 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en; defaults 517 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddc; defaults 528 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 534 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c defaults->tdc_vddc_throttle_release_limit_perc; defaults 535 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.TDC_MAWt = defaults->tdc_mawt; defaults 543 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 554 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl; defaults 717 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 731 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c dpm_table->DTEAmbientTempBase = defaults->dte_ambient_temp_base; defaults 744 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c dpm_table->BAPM_TEMP_GRADIENT = PP_HOST_TO_SMC_UL(defaults->bapm_temp_gradient); defaults 745 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c def1 = defaults->bapmti_r; defaults 746 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c def2 = defaults->bapmti_rc; defaults 490 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 516 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c dpm_table->DTEAmbientTempBase = defaults->DTEAmbientTempBase; defaults 573 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 575 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn; defaults 576 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC; defaults 590 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 599 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c defaults->TDC_VDDC_ThrottleReleaseLimitPerc; defaults 600 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt; defaults 608 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 619 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.TdcWaterfallCtl = defaults->TdcWaterfallCtl; defaults 309 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 311 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en; defaults 312 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddc; defaults 323 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 329 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c defaults->tdc_vddc_throttle_release_limit_perc; defaults 330 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.TDC_MAWt = defaults->tdc_mawt; defaults 338 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 349 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl; defaults 1853 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 1875 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c dpm_table->DTEAmbientTempBase = defaults->dte_ambient_temp_base; defaults 1889 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c dpm_table->BAPM_TEMP_GRADIENT = PP_HOST_TO_SMC_UL(defaults->bapm_temp_gradient); defaults 1890 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c def1 = defaults->bapmti_r; defaults 1891 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c def2 = defaults->bapmti_rc; defaults 428 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 455 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c pdef1 = defaults->BAPMTI_R; defaults 456 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c pdef2 = defaults->BAPMTI_RC; defaults 475 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 477 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn; defaults 478 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC; defaults 491 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 497 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c defaults->TDC_VDDC_ThrottleReleaseLimitPerc; defaults 498 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt; defaults 506 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 517 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.TdcWaterfallCtl = defaults->TdcWaterfallCtl; defaults 1830 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 1850 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c dpm_table->DTEAmbientTempBase = defaults->dte_ambient_temp_base; defaults 1853 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c PP_HOST_TO_SMC_UL(defaults->bapm_temp_gradient); defaults 1854 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c pdef1 = defaults->bapmti_r; defaults 1855 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c pdef2 = defaults->bapmti_rc; defaults 1877 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 1879 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en; defaults 1880 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddC; defaults 1892 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 1903 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c defaults->tdc_vddc_throttle_release_limit_perc; defaults 1904 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.TDC_MAWt = defaults->tdc_mawt; defaults 1913 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 1925 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl; defaults 1446 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 1473 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c pdef1 = defaults->BAPMTI_R; defaults 1474 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c pdef2 = defaults->BAPMTI_RC; defaults 1740 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 1742 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn; defaults 1743 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC; defaults 1756 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 1762 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c defaults->TDC_VDDC_ThrottleReleaseLimitPerc; defaults 1763 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt; defaults 1771 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults; defaults 1782 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.TdcWaterfallCtl = defaults->TdcWaterfallCtl; defaults 3317 drivers/gpu/drm/i915/gt/intel_lrc.c void *defaults; defaults 3319 drivers/gpu/drm/i915/gt/intel_lrc.c defaults = i915_gem_object_pin_map(engine->default_state, defaults 3321 drivers/gpu/drm/i915/gt/intel_lrc.c if (IS_ERR(defaults)) { defaults 3322 drivers/gpu/drm/i915/gt/intel_lrc.c ret = PTR_ERR(defaults); defaults 3326 drivers/gpu/drm/i915/gt/intel_lrc.c memcpy(vaddr + start, defaults + start, engine->context_size); defaults 1433 drivers/gpu/drm/i915/gt/intel_ringbuffer.c void *defaults, *vaddr; defaults 1441 drivers/gpu/drm/i915/gt/intel_ringbuffer.c defaults = i915_gem_object_pin_map(engine->default_state, defaults 1443 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (IS_ERR(defaults)) { defaults 1444 drivers/gpu/drm/i915/gt/intel_ringbuffer.c err = PTR_ERR(defaults); defaults 1448 drivers/gpu/drm/i915/gt/intel_ringbuffer.c memcpy(vaddr, defaults, engine->context_size); defaults 101 drivers/media/rc/img-ir/img-ir-hw.c struct img_ir_timing_range *defaults) defaults 104 drivers/media/rc/img-ir/img-ir-hw.c range->min = defaults->min; defaults 106 drivers/media/rc/img-ir/img-ir-hw.c range->max = defaults->max; defaults 110 drivers/media/rc/img-ir/img-ir-hw.c struct img_ir_symbol_timing *defaults) defaults 112 drivers/media/rc/img-ir/img-ir-hw.c img_ir_timing_defaults(&timing->pulse, &defaults->pulse); defaults 113 drivers/media/rc/img-ir/img-ir-hw.c img_ir_timing_defaults(&timing->space, &defaults->space); defaults 117 drivers/media/rc/img-ir/img-ir-hw.c struct img_ir_timings *defaults) defaults 119 drivers/media/rc/img-ir/img-ir-hw.c img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr); defaults 120 drivers/media/rc/img-ir/img-ir-hw.c img_ir_symbol_timing_defaults(&timings->s00, &defaults->s00); defaults 121 drivers/media/rc/img-ir/img-ir-hw.c img_ir_symbol_timing_defaults(&timings->s01, &defaults->s01); defaults 122 drivers/media/rc/img-ir/img-ir-hw.c img_ir_symbol_timing_defaults(&timings->s10, &defaults->s10); defaults 123 drivers/media/rc/img-ir/img-ir-hw.c img_ir_symbol_timing_defaults(&timings->s11, &defaults->s11); defaults 125 drivers/media/rc/img-ir/img-ir-hw.c timings->ft.ft_min = defaults->ft.ft_min; defaults 1237 drivers/net/ethernet/mellanox/mlx4/mlx4.h enum mlx4_port_type *defaults); defaults 66 drivers/net/ethernet/mellanox/mlx4/sense.c enum mlx4_port_type *defaults) defaults 78 drivers/net/ethernet/mellanox/mlx4/sense.c stype[i - 1] = defaults[i - 1]; defaults 80 drivers/net/ethernet/mellanox/mlx4/sense.c stype[i - 1] = defaults[i - 1]; defaults 87 drivers/net/ethernet/mellanox/mlx4/sense.c stype[i] = stype[i] ? stype[i] : defaults[i]; defaults 923 drivers/net/wan/lmc/lmc_main.c sc->lmc_media->defaults (sc); defaults 97 drivers/net/wan/lmc/lmc_media.c .defaults = lmc_ds3_default, /* reset to default state */ defaults 112 drivers/net/wan/lmc/lmc_media.c .defaults = lmc_hssi_default, /* reset to default state */ defaults 127 drivers/net/wan/lmc/lmc_media.c .defaults = lmc_ssi_default, /* reset to default state */ defaults 142 drivers/net/wan/lmc/lmc_media.c .defaults = lmc_t1_default, /* reset to default state */ defaults 207 drivers/net/wan/lmc/lmc_var.h void (* defaults)(lmc_softc_t * const); defaults 1175 drivers/rpmsg/qcom_glink_native.c __be32 defaults[] = { cpu_to_be32(SZ_1K), cpu_to_be32(5) }; defaults 1178 drivers/rpmsg/qcom_glink_native.c __be32 *val = defaults; defaults 2661 drivers/scsi/sd.c goto defaults; defaults 2664 drivers/scsi/sd.c goto defaults; defaults 2728 drivers/scsi/sd.c goto defaults; defaults 2744 drivers/scsi/sd.c goto defaults; defaults 2750 drivers/scsi/sd.c goto defaults; defaults 2798 drivers/scsi/sd.c defaults: defaults 129 net/sched/sch_cbq.c struct cbq_class *defaults[TC_PRIO_MAX + 1]; defaults 184 net/sched/sch_cbq.c struct cbq_class *new = cl->defaults[TC_PRIO_BESTEFFORT]; defaults 225 net/sched/sch_cbq.c defmap = head->defaults; defaults 278 net/sched/sch_cbq.c !(cl = head->defaults[prio & TC_PRIO_MAX]) && defaults 279 net/sched/sch_cbq.c !(cl = head->defaults[TC_PRIO_BESTEFFORT])) defaults 922 net/sched/sch_cbq.c if (split->defaults[i] == cl && !(cl->defmap & (1<<i))) defaults 923 net/sched/sch_cbq.c split->defaults[i] = NULL; defaults 929 net/sched/sch_cbq.c if (split->defaults[i]) defaults 939 net/sched/sch_cbq.c split->defaults[i] = c; defaults 1768 tools/perf/builtin-diff.c static const char *defaults[] = { defaults 1779 tools/perf/builtin-diff.c defaults[1] = argv[0]; defaults 1785 tools/perf/builtin-diff.c defaults[0] = "perf.data.host"; defaults 1786 tools/perf/builtin-diff.c defaults[1] = "perf.data.guest"; defaults 1801 tools/perf/builtin-diff.c data->path = use_default ? defaults[i] : argv[i];