default_ctrl      214 arch/x86/kernel/cpu/resctrl/core.c 	r->default_ctrl = max_cbm;
default_ctrl      262 arch/x86/kernel/cpu/resctrl/core.c 	r->default_ctrl = MAX_MBA_BW;
default_ctrl      287 arch/x86/kernel/cpu/resctrl/core.c 	r->default_ctrl = MAX_MBA_BW_AMD;
default_ctrl      312 arch/x86/kernel/cpu/resctrl/core.c 	r->default_ctrl = BIT_MASK(eax.split.cbm_len + 1) - 1;
default_ctrl      313 arch/x86/kernel/cpu/resctrl/core.c 	r->cache.shareable_bits = ebx & r->default_ctrl;
default_ctrl      326 arch/x86/kernel/cpu/resctrl/core.c 	r->default_ctrl = r_l->default_ctrl;
default_ctrl      382 arch/x86/kernel/cpu/resctrl/core.c 	return r->default_ctrl;
default_ctrl      478 arch/x86/kernel/cpu/resctrl/core.c 		*dc = r->default_ctrl;
default_ctrl       42 arch/x86/kernel/cpu/resctrl/ctrlmondata.c 	if (bw < r->membw.min_bw || bw > r->default_ctrl) {
default_ctrl       44 arch/x86/kernel/cpu/resctrl/ctrlmondata.c 				    r->membw.min_bw, r->default_ctrl);
default_ctrl       96 arch/x86/kernel/cpu/resctrl/ctrlmondata.c 	if ((bw < r->membw.min_bw || bw > r->default_ctrl) &&
default_ctrl       99 arch/x86/kernel/cpu/resctrl/ctrlmondata.c 				    r->membw.min_bw, r->default_ctrl);
default_ctrl      143 arch/x86/kernel/cpu/resctrl/ctrlmondata.c 	if (val == 0 || val > r->default_ctrl) {
default_ctrl      181 arch/x86/kernel/cpu/resctrl/ctrlmondata.c 	if (val > r->default_ctrl) {
default_ctrl      447 arch/x86/kernel/cpu/resctrl/internal.h 	u32			default_ctrl;
default_ctrl      757 arch/x86/kernel/cpu/resctrl/rdtgroup.c 	seq_printf(seq, "%x\n", r->default_ctrl);
default_ctrl     2147 arch/x86/kernel/cpu/resctrl/rdtgroup.c 			d->ctrl_val[i] = r->default_ctrl;
default_ctrl     2626 arch/x86/kernel/cpu/resctrl/rdtgroup.c 		d->new_ctrl = is_mba_sc(r) ? MBA_MAX_MBPS : r->default_ctrl;