def2              439 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 	uint32_t def, data, def1, data1, def2 = 0, data2 = 0;
def2              445 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 		def2 = data2 = RREG32_SOC15(MMHUB, 0, mmDAGB1_CNTL_MISC2);
def2              495 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 	if (adev->asic_type != CHIP_RAVEN && def2 != data2)
def2              721 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	const uint16_t *def1, *def2;
def2              746 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	def2 = defaults->bapmti_rc;
def2              752 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				dpm_table->BAPMTI_RC[i][j][k] = PP_HOST_TO_SMC_US(*def2);
def2              754 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				def2++;
def2             1857 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	const uint16_t *def1, *def2;
def2             1891 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	def2 = defaults->bapmti_rc;
def2             1897 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				dpm_table->BAPMTI_RC[i][j][k] = PP_HOST_TO_SMC_US(*def2);
def2             1899 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				def2++;
def2              441 drivers/gpu/drm/radeon/ci_dpm.c 	const u16 *def2;
def2              463 drivers/gpu/drm/radeon/ci_dpm.c 	def2 = pt_defaults->bapmti_rc;
def2              469 drivers/gpu/drm/radeon/ci_dpm.c 				dpm_table->BAPMTI_RC[i][j][k] = cpu_to_be16(*def2);
def2              471 drivers/gpu/drm/radeon/ci_dpm.c 				def2++;