def1 439 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c uint32_t def, data, def1, data1, def2 = 0, data2 = 0; def1 444 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); def1 447 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_RV); def1 488 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (def1 != data1) { def1 362 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c uint32_t def, data, def1, data1; def1 366 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); def1 392 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c if (def1 != data1) def1 535 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c uint32_t def, data, def1, data1; def1 554 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c def1 = data1 = RREG32_SOC15_OFFSET(MMHUB, 0, def1 577 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c if (def1 != data1) def1 721 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c const uint16_t *def1, *def2; def1 745 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c def1 = defaults->bapmti_r; def1 751 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c dpm_table->BAPMTI_R[i][j][k] = PP_HOST_TO_SMC_US(*def1); def1 753 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c def1++; def1 1857 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c const uint16_t *def1, *def2; def1 1890 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c def1 = defaults->bapmti_r; def1 1896 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c dpm_table->BAPMTI_R[i][j][k] = PP_HOST_TO_SMC_US(*def1); def1 1898 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c def1++; def1 440 drivers/gpu/drm/radeon/ci_dpm.c const u16 *def1; def1 462 drivers/gpu/drm/radeon/ci_dpm.c def1 = pt_defaults->bapmti_r; def1 468 drivers/gpu/drm/radeon/ci_dpm.c dpm_table->BAPMTI_R[i][j][k] = cpu_to_be16(*def1); def1 470 drivers/gpu/drm/radeon/ci_dpm.c def1++;