de_cfg 160 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c struct dpu_hw_scaler3_de_cfg *de_cfg, u32 offset) de_cfg 165 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c if (!de_cfg->enable) de_cfg 168 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c sharp_lvl = (de_cfg->sharpen_level1 & 0x1FF) | de_cfg 169 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c ((de_cfg->sharpen_level2 & 0x1FF) << 16); de_cfg 171 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c sharp_ctl = ((de_cfg->limit & 0xF) << 9) | de_cfg 172 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c ((de_cfg->prec_shift & 0x7) << 13) | de_cfg 173 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c ((de_cfg->clip & 0x7) << 16); de_cfg 175 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c shape_ctl = (de_cfg->thr_quiet & 0xFF) | de_cfg 176 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c ((de_cfg->thr_dieout & 0x3FF) << 16); de_cfg 178 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c de_thr = (de_cfg->thr_low & 0x3FF) | de_cfg 179 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c ((de_cfg->thr_high & 0x3FF) << 16); de_cfg 181 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c adjust_a = (de_cfg->adjust_a[0] & 0x3FF) | de_cfg 182 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c ((de_cfg->adjust_a[1] & 0x3FF) << 10) | de_cfg 183 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c ((de_cfg->adjust_a[2] & 0x3FF) << 20); de_cfg 185 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c adjust_b = (de_cfg->adjust_b[0] & 0x3FF) | de_cfg 186 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c ((de_cfg->adjust_b[1] & 0x3FF) << 10) | de_cfg 187 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c ((de_cfg->adjust_b[2] & 0x3FF) << 20); de_cfg 189 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c adjust_c = (de_cfg->adjust_c[0] & 0x3FF) | de_cfg 190 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c ((de_cfg->adjust_c[1] & 0x3FF) << 10) | de_cfg 191 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c ((de_cfg->adjust_c[2] & 0x3FF) << 20);