ddiv 37 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c u32 ddiv; ddiv 210 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c calc_div(struct gf100_clk *clk, int idx, u32 ref, u32 freq, u32 *ddiv) ddiv 216 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c *ddiv = div - 2; ddiv 221 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c calc_src(struct gf100_clk *clk, int idx, u32 freq, u32 *dsrc, u32 *ddiv) ddiv 226 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c *ddiv = 0x00000000; ddiv 245 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c sclk = calc_div(clk, idx, sclk, freq, ddiv); ddiv 302 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c info->ddiv |= 0x80000000; ddiv 303 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c info->ddiv |= div0 << 8; ddiv 304 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c info->ddiv |= div0; ddiv 349 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c nvkm_mask(device, 0x1371d0 + (idx * 0x04), 0x80003f3f, info->ddiv); ddiv 37 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c u32 ddiv; ddiv 223 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c calc_div(struct gk104_clk *clk, int idx, u32 ref, u32 freq, u32 *ddiv) ddiv 229 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c *ddiv = div - 2; ddiv 234 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c calc_src(struct gk104_clk *clk, int idx, u32 freq, u32 *dsrc, u32 *ddiv) ddiv 239 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c *ddiv = 0x00000000; ddiv 258 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c sclk = calc_div(clk, idx, sclk, freq, ddiv); ddiv 316 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c info->ddiv |= 0x80000000; ddiv 317 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c info->ddiv |= div0; ddiv 362 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c nvkm_mask(device, 0x1371d0 + (idx * 0x04), 0x8000003f, info->ddiv);