ddc_int_ctrl       44 drivers/gpu/drm/msm/hdmi/hdmi_i2c.c 	uint32_t ddc_int_ctrl;
ddc_int_ctrl       53 drivers/gpu/drm/msm/hdmi/hdmi_i2c.c 		ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL);
ddc_int_ctrl       55 drivers/gpu/drm/msm/hdmi/hdmi_i2c.c 	} while ((ddc_int_ctrl & HDMI_DDC_INT_CTRL_SW_DONE_INT) && retry);
ddc_int_ctrl       74 drivers/gpu/drm/msm/hdmi/hdmi_i2c.c 		uint32_t ddc_int_ctrl;
ddc_int_ctrl       76 drivers/gpu/drm/msm/hdmi/hdmi_i2c.c 		ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL);
ddc_int_ctrl       78 drivers/gpu/drm/msm/hdmi/hdmi_i2c.c 		if ((ddc_int_ctrl & HDMI_DDC_INT_CTRL_SW_DONE_MASK) &&
ddc_int_ctrl       79 drivers/gpu/drm/msm/hdmi/hdmi_i2c.c 				(ddc_int_ctrl & HDMI_DDC_INT_CTRL_SW_DONE_INT)) {