ddb_y            12880 drivers/gpu/drm/i915/display/intel_display.c 		struct skl_ddb_entry ddb_y[I915_MAX_PLANES];
ddb_y            12901 drivers/gpu/drm/i915/display/intel_display.c 	skl_pipe_ddb_get_hw_state(crtc, hw->ddb_y, hw->ddb_uv);
ddb_y            12948 drivers/gpu/drm/i915/display/intel_display.c 		hw_ddb_entry = &hw->ddb_y[plane];
ddb_y            13000 drivers/gpu/drm/i915/display/intel_display.c 		hw_ddb_entry = &hw->ddb_y[PLANE_CURSOR];
ddb_y            3988 drivers/gpu/drm/i915/intel_pm.c 			   struct skl_ddb_entry *ddb_y,
ddb_y            3997 drivers/gpu/drm/i915/intel_pm.c 		skl_ddb_entry_init_from_hw(dev_priv, ddb_y, val);
ddb_y            4011 drivers/gpu/drm/i915/intel_pm.c 		skl_ddb_entry_init_from_hw(dev_priv, ddb_y, val);
ddb_y            4019 drivers/gpu/drm/i915/intel_pm.c 		skl_ddb_entry_init_from_hw(dev_priv, ddb_y, val);
ddb_y            4025 drivers/gpu/drm/i915/intel_pm.c 			       struct skl_ddb_entry *ddb_y,
ddb_y            4042 drivers/gpu/drm/i915/intel_pm.c 					   &ddb_y[plane_id],
ddb_y            5156 drivers/gpu/drm/i915/intel_pm.c 	const struct skl_ddb_entry *ddb_y =
ddb_y            5170 drivers/gpu/drm/i915/intel_pm.c 				    PLANE_BUF_CFG(pipe, plane_id), ddb_y);
ddb_y            5175 drivers/gpu/drm/i915/intel_pm.c 		swap(ddb_y, ddb_uv);
ddb_y            5178 drivers/gpu/drm/i915/intel_pm.c 			    PLANE_BUF_CFG(pipe, plane_id), ddb_y);
ddb_y              50 drivers/gpu/drm/i915/intel_pm.h 			       struct skl_ddb_entry *ddb_y,