dct_sel_hi       1667 drivers/edac/amd64_edac.c 	amd64_read_pci_cfg(pvt->F2, DCT_SEL_HI, &pvt->dct_sel_hi);
dct_sel_hi       1756 drivers/edac/amd64_edac.c 	u64 dct_sel_base_off	= (u64)(pvt->dct_sel_hi & 0xFFFFFC00) << 16;
dct_sel_hi        373 drivers/edac/amd64_edac.h 	u32 dct_sel_hi;		/* DRAM Controller Select High */
dct_sel_hi        441 drivers/edac/amd64_edac.h 		return (((pvt->dct_sel_hi >> 9) & 0x1) << 2) |