dct_cont_limit_reg 1991 drivers/edac/amd64_edac.c u32 dct_cont_base_reg, dct_cont_limit_reg, tmp; dct_cont_limit_reg 2000 drivers/edac/amd64_edac.c amd64_read_pci_cfg(pvt->F1, DRAM_CONT_LIMIT, &dct_cont_limit_reg); dct_cont_limit_reg 2022 drivers/edac/amd64_edac.c dct_limit = (dct_cont_limit_reg >> 11) & 0x1FFF;