dcrbase_l2c 25 arch/powerpc/platforms/4xx/soc.c static u32 dcrbase_l2c; dcrbase_l2c 34 arch/powerpc/platforms/4xx/soc.c mtdcr(dcrbase_l2c + DCRN_L2C0_ADDR, addr); dcrbase_l2c 35 arch/powerpc/platforms/4xx/soc.c mtdcr(dcrbase_l2c + DCRN_L2C0_CMD, L2C_CMD_DIAG); dcrbase_l2c 36 arch/powerpc/platforms/4xx/soc.c while (!(mfdcr(dcrbase_l2c + DCRN_L2C0_SR) & L2C_SR_CC)) dcrbase_l2c 39 arch/powerpc/platforms/4xx/soc.c return mfdcr(dcrbase_l2c + DCRN_L2C0_DATA); dcrbase_l2c 44 arch/powerpc/platforms/4xx/soc.c u32 sr = mfdcr(dcrbase_l2c + DCRN_L2C0_SR); dcrbase_l2c 61 arch/powerpc/platforms/4xx/soc.c mtdcr(dcrbase_l2c + DCRN_L2C0_ADDR, 0); dcrbase_l2c 62 arch/powerpc/platforms/4xx/soc.c mtdcr(dcrbase_l2c + DCRN_L2C0_CMD, L2C_CMD_CCP | L2C_CMD_CTE); dcrbase_l2c 103 arch/powerpc/platforms/4xx/soc.c dcrbase_l2c = dcrreg[2]; dcrbase_l2c 137 arch/powerpc/platforms/4xx/soc.c r = mfdcr(dcrbase_l2c + DCRN_L2C0_CFG) & dcrbase_l2c 140 arch/powerpc/platforms/4xx/soc.c mtdcr(dcrbase_l2c + DCRN_L2C0_CFG, r); dcrbase_l2c 142 arch/powerpc/platforms/4xx/soc.c mtdcr(dcrbase_l2c + DCRN_L2C0_ADDR, 0); dcrbase_l2c 145 arch/powerpc/platforms/4xx/soc.c mtdcr(dcrbase_l2c + DCRN_L2C0_CMD, L2C_CMD_HCC); dcrbase_l2c 146 arch/powerpc/platforms/4xx/soc.c while (!(mfdcr(dcrbase_l2c + DCRN_L2C0_SR) & L2C_SR_CC)) dcrbase_l2c 150 arch/powerpc/platforms/4xx/soc.c mtdcr(dcrbase_l2c + DCRN_L2C0_CMD, L2C_CMD_CCP | L2C_CMD_CTE); dcrbase_l2c 153 arch/powerpc/platforms/4xx/soc.c r = mfdcr(dcrbase_l2c + DCRN_L2C0_SNP0) & dcrbase_l2c 156 arch/powerpc/platforms/4xx/soc.c mtdcr(dcrbase_l2c + DCRN_L2C0_SNP0, r); dcrbase_l2c 158 arch/powerpc/platforms/4xx/soc.c r = mfdcr(dcrbase_l2c + DCRN_L2C0_SNP1) & dcrbase_l2c 161 arch/powerpc/platforms/4xx/soc.c mtdcr(dcrbase_l2c + DCRN_L2C0_SNP1, r); dcrbase_l2c 166 arch/powerpc/platforms/4xx/soc.c r = mfdcr(dcrbase_l2c + DCRN_L2C0_CFG); dcrbase_l2c 177 arch/powerpc/platforms/4xx/soc.c mtdcr(dcrbase_l2c + DCRN_L2C0_CFG, r);