dcr_host           37 arch/powerpc/platforms/4xx/cpm.c 	dcr_host_t	dcr_host;
dcr_host           69 arch/powerpc/platforms/4xx/cpm.c 	value = dcr_read(cpm.dcr_host, cpm.dcr_offset[cpm_reg]);
dcr_host           70 arch/powerpc/platforms/4xx/cpm.c 	dcr_write(cpm.dcr_host, cpm.dcr_offset[cpm_reg], value | mask);
dcr_host          103 arch/powerpc/platforms/4xx/cpm.c 	dcr_write(cpm.dcr_host, cpm.dcr_offset[CPM_ER], er_save);
dcr_host          273 arch/powerpc/platforms/4xx/cpm.c 	cpm.dcr_host = dcr_map(np, dcr_base, dcr_len);
dcr_host          275 arch/powerpc/platforms/4xx/cpm.c 	if (!DCR_MAP_OK(cpm.dcr_host)) {
dcr_host           70 arch/powerpc/platforms/cell/axon_msi.c 	dcr_host_t dcr_host;
dcr_host           89 arch/powerpc/platforms/cell/axon_msi.c 	dcr_write(msic->dcr_host, dcr_n, val);
dcr_host          100 arch/powerpc/platforms/cell/axon_msi.c 	write_offset = dcr_read(msic->dcr_host, MSIC_WRITE_OFFSET_REG);
dcr_host          327 arch/powerpc/platforms/cell/axon_msi.c 	tmp  = dcr_read(msic->dcr_host, MSIC_CTRL_REG);
dcr_host          358 arch/powerpc/platforms/cell/axon_msi.c 	msic->dcr_host = dcr_map(dn, dcr_base, dcr_len);
dcr_host          359 arch/powerpc/platforms/cell/axon_msi.c 	if (!DCR_MAP_OK(msic->dcr_host)) {
dcr_host          401 arch/powerpc/platforms/cell/axon_msi.c 	msic->read_offset = dcr_read(msic->dcr_host, MSIC_WRITE_OFFSET_REG)
dcr_host          161 drivers/edac/ppc4xx_edac.c 	dcr_host_t dcr_host;	/* Indirect DCR address/data window mapping */
dcr_host          242 drivers/edac/ppc4xx_edac.c mfsdram(const dcr_host_t *dcr_host, unsigned int idcr_n)
dcr_host          244 drivers/edac/ppc4xx_edac.c 	return __mfdcri(dcr_host->base + SDRAM_DCR_ADDR_OFFSET,
dcr_host          245 drivers/edac/ppc4xx_edac.c 			dcr_host->base + SDRAM_DCR_DATA_OFFSET,
dcr_host          259 drivers/edac/ppc4xx_edac.c mtsdram(const dcr_host_t *dcr_host, unsigned int idcr_n, u32 value)
dcr_host          261 drivers/edac/ppc4xx_edac.c 	return __mtdcri(dcr_host->base + SDRAM_DCR_ADDR_OFFSET,
dcr_host          262 drivers/edac/ppc4xx_edac.c 			dcr_host->base + SDRAM_DCR_DATA_OFFSET,
dcr_host          389 drivers/edac/ppc4xx_edac.c 		switch (mfsdram(&pdata->dcr_host, SDRAM_MCOPT1) &
dcr_host          667 drivers/edac/ppc4xx_edac.c 	const dcr_host_t *dcr_host = &pdata->dcr_host;
dcr_host          669 drivers/edac/ppc4xx_edac.c 	status->ecces = mfsdram(dcr_host, SDRAM_ECCES) & SDRAM_ECCES_MASK;
dcr_host          670 drivers/edac/ppc4xx_edac.c 	status->wmirq = mfsdram(dcr_host, SDRAM_WMIRQ) & SDRAM_WMIRQ_MASK;
dcr_host          671 drivers/edac/ppc4xx_edac.c 	status->besr  = mfsdram(dcr_host, SDRAM_BESR)  & SDRAM_BESR_MASK;
dcr_host          672 drivers/edac/ppc4xx_edac.c 	status->bearl = mfsdram(dcr_host, SDRAM_BEARL);
dcr_host          673 drivers/edac/ppc4xx_edac.c 	status->bearh = mfsdram(dcr_host, SDRAM_BEARH);
dcr_host          692 drivers/edac/ppc4xx_edac.c 	const dcr_host_t *dcr_host = &pdata->dcr_host;
dcr_host          694 drivers/edac/ppc4xx_edac.c 	mtsdram(dcr_host, SDRAM_ECCES,	status->ecces & SDRAM_ECCES_MASK);
dcr_host          695 drivers/edac/ppc4xx_edac.c 	mtsdram(dcr_host, SDRAM_WMIRQ,	status->wmirq & SDRAM_WMIRQ_MASK);
dcr_host          696 drivers/edac/ppc4xx_edac.c 	mtsdram(dcr_host, SDRAM_BESR,	status->besr & SDRAM_BESR_MASK);
dcr_host          697 drivers/edac/ppc4xx_edac.c 	mtsdram(dcr_host, SDRAM_BEARL,	0);
dcr_host          698 drivers/edac/ppc4xx_edac.c 	mtsdram(dcr_host, SDRAM_BEARH,	0);
dcr_host          926 drivers/edac/ppc4xx_edac.c 		mbxcf = mfsdram(&pdata->dcr_host, SDRAM_MBXCF(row));
dcr_host         1008 drivers/edac/ppc4xx_edac.c 			       const dcr_host_t *dcr_host, u32 mcopt1)
dcr_host         1026 drivers/edac/ppc4xx_edac.c 	pdata->dcr_host		= *dcr_host;
dcr_host         1174 drivers/edac/ppc4xx_edac.c 				dcr_host_t *dcr_host)
dcr_host         1178 drivers/edac/ppc4xx_edac.c 	if (np == NULL || dcr_host == NULL)
dcr_host         1201 drivers/edac/ppc4xx_edac.c 	*dcr_host = dcr_map(np, dcr_base, dcr_len);
dcr_host         1203 drivers/edac/ppc4xx_edac.c 	if (!DCR_MAP_OK(*dcr_host)) {
dcr_host         1226 drivers/edac/ppc4xx_edac.c 	dcr_host_t dcr_host;
dcr_host         1249 drivers/edac/ppc4xx_edac.c 	status = ppc4xx_edac_map_dcrs(np, &dcr_host);
dcr_host         1260 drivers/edac/ppc4xx_edac.c 	mcopt1 = mfsdram(&dcr_host, SDRAM_MCOPT1);
dcr_host         1291 drivers/edac/ppc4xx_edac.c 	status = ppc4xx_edac_mc_init(mci, op, &dcr_host, mcopt1);
dcr_host         1356 drivers/edac/ppc4xx_edac.c 	dcr_unmap(pdata->dcr_host, SDRAM_DCR_RESOURCE_LEN);
dcr_host          562 drivers/net/ethernet/ibm/emac/mal.c 	mal->dcr_host = dcr_map(ofdev->dev.of_node, dcr_base, 0x100);
dcr_host          563 drivers/net/ethernet/ibm/emac/mal.c 	if (!DCR_MAP_OK(mal->dcr_host)) {
dcr_host          705 drivers/net/ethernet/ibm/emac/mal.c 	dcr_unmap(mal->dcr_host, 0x100);
dcr_host          184 drivers/net/ethernet/ibm/emac/mal.h 	dcr_host_t		dcr_host;
dcr_host          215 drivers/net/ethernet/ibm/emac/mal.h 	return dcr_read(mal->dcr_host, reg);
dcr_host          220 drivers/net/ethernet/ibm/emac/mal.h 	dcr_write(mal->dcr_host, reg, val);
dcr_host          144 drivers/video/fbdev/xilinxfb.c 	dcr_host_t      dcr_host;
dcr_host          178 drivers/video/fbdev/xilinxfb.c 		dcr_write(drvdata->dcr_host, offset, val);
dcr_host          192 drivers/video/fbdev/xilinxfb.c 		return dcr_read(drvdata->dcr_host, offset);
dcr_host          401 drivers/video/fbdev/xilinxfb.c 		dcr_unmap(drvdata->dcr_host, drvdata->dcr_len);
dcr_host          446 drivers/video/fbdev/xilinxfb.c 		drvdata->dcr_host = dcr_map(pdev->dev.of_node, start, drvdata->dcr_len);
dcr_host          447 drivers/video/fbdev/xilinxfb.c 		if (!DCR_MAP_OK(drvdata->dcr_host)) {