dcpll            1092 drivers/gpu/drm/radeon/atombios_crtc.c 		pll = &rdev->clock.dcpll;
dcpll             266 drivers/gpu/drm/radeon/radeon.h 	struct radeon_pll dcpll;
dcpll            1147 drivers/gpu/drm/radeon/radeon_atombios.c 	struct radeon_pll *dcpll = &rdev->clock.dcpll;
dcpll            1279 drivers/gpu/drm/radeon/radeon_atombios.c 		*dcpll = *p1pll;
dcpll             184 drivers/gpu/drm/radeon/radeon_clocks.c 	struct radeon_pll *dcpll = &rdev->clock.dcpll;
dcpll             299 drivers/gpu/drm/radeon/radeon_clocks.c 	dcpll->min_post_div = 2;
dcpll             300 drivers/gpu/drm/radeon/radeon_clocks.c 	dcpll->max_post_div = 0x7f;
dcpll             301 drivers/gpu/drm/radeon/radeon_clocks.c 	dcpll->min_frac_feedback_div = 0;
dcpll             302 drivers/gpu/drm/radeon/radeon_clocks.c 	dcpll->max_frac_feedback_div = 9;
dcpll             303 drivers/gpu/drm/radeon/radeon_clocks.c 	dcpll->min_ref_div = 2;
dcpll             304 drivers/gpu/drm/radeon/radeon_clocks.c 	dcpll->max_ref_div = 0x3ff;
dcpll             305 drivers/gpu/drm/radeon/radeon_clocks.c 	dcpll->min_feedback_div = 4;
dcpll             306 drivers/gpu/drm/radeon/radeon_clocks.c 	dcpll->max_feedback_div = 0xfff;
dcpll             307 drivers/gpu/drm/radeon/radeon_clocks.c 	dcpll->best_vco = 0;