DP_VID_N          999 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 		REG_UPDATE(DP_VID_N, DP_VID_N, n_vid);
DP_VID_N           90 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SRI(DP_VID_N, DP, id), \
DP_VID_N          166 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SE_SF(DP_VID_N, DP_VID_N, mask_sh),\
DP_VID_N          248 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SE_SF(DP0_DP_VID_N, DP_VID_N, mask_sh),\
DP_VID_N          444 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_VID_N;
DP_VID_N          575 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint32_t DP_VID_N;
DP_VID_N          664 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint32_t DP_VID_N;
DP_VID_N          964 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 		REG_UPDATE(DP_VID_N, DP_VID_N, n_vid);
DP_VID_N           88 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	SRI(DP_VID_N, DP, id), \
DP_VID_N          133 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	uint32_t DP_VID_N;
DP_VID_N          220 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	SE_SF(DP0_DP_VID_N, DP_VID_N, mask_sh),\
DP_VID_N          410 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	type DP_VID_N;\
DP_VID_N          486 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c 		REG_UPDATE(DP_VID_N, DP_VID_N, n_vid);