dcn_ip 492 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dlg_sys_param.t_srx_delay_us = dc->dcn_ip->dcfclk_cstate_latency / v->dcf_clk_deep_sleep; dcn_ip 789 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->rob_buffer_size_in_kbyte = dc->dcn_ip->rob_buffer_size_in_kbyte; dcn_ip 790 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->det_buffer_size_in_kbyte = dc->dcn_ip->det_buffer_size_in_kbyte; dcn_ip 791 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dpp_output_buffer_pixels = dc->dcn_ip->dpp_output_buffer_pixels; dcn_ip 792 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->opp_output_buffer_lines = dc->dcn_ip->opp_output_buffer_lines; dcn_ip 793 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->pixel_chunk_size_in_kbyte = dc->dcn_ip->pixel_chunk_size_in_kbyte; dcn_ip 794 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->pte_enable = dc->dcn_ip->pte_enable; dcn_ip 795 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->pte_chunk_size = dc->dcn_ip->pte_chunk_size; dcn_ip 796 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->meta_chunk_size = dc->dcn_ip->meta_chunk_size; dcn_ip 797 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->writeback_chunk_size = dc->dcn_ip->writeback_chunk_size; dcn_ip 798 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->odm_capability = dc->dcn_ip->odm_capability; dcn_ip 799 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dsc_capability = dc->dcn_ip->dsc_capability; dcn_ip 800 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->line_buffer_size = dc->dcn_ip->line_buffer_size; dcn_ip 801 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->is_line_buffer_bpp_fixed = dc->dcn_ip->is_line_buffer_bpp_fixed; dcn_ip 802 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->line_buffer_fixed_bpp = dc->dcn_ip->line_buffer_fixed_bpp; dcn_ip 803 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_line_buffer_lines = dc->dcn_ip->max_line_buffer_lines; dcn_ip 804 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->writeback_luma_buffer_size = dc->dcn_ip->writeback_luma_buffer_size; dcn_ip 805 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->writeback_chroma_buffer_size = dc->dcn_ip->writeback_chroma_buffer_size; dcn_ip 806 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_num_dpp = dc->dcn_ip->max_num_dpp; dcn_ip 807 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_num_writeback = dc->dcn_ip->max_num_writeback; dcn_ip 808 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dchub_topscl_throughput = dc->dcn_ip->max_dchub_topscl_throughput; dcn_ip 809 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_pscl_tolb_throughput = dc->dcn_ip->max_pscl_tolb_throughput; dcn_ip 810 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_lb_tovscl_throughput = dc->dcn_ip->max_lb_tovscl_throughput; dcn_ip 811 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_vscl_tohscl_throughput = dc->dcn_ip->max_vscl_tohscl_throughput; dcn_ip 812 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_hscl_ratio = dc->dcn_ip->max_hscl_ratio; dcn_ip 813 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_vscl_ratio = dc->dcn_ip->max_vscl_ratio; dcn_ip 814 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_hscl_taps = dc->dcn_ip->max_hscl_taps; dcn_ip 815 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_vscl_taps = dc->dcn_ip->max_vscl_taps; dcn_ip 816 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->under_scan_factor = dc->dcn_ip->under_scan_factor; dcn_ip 817 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->pte_buffer_size_in_requests = dc->dcn_ip->pte_buffer_size_in_requests; dcn_ip 818 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dispclk_ramping_margin = dc->dcn_ip->dispclk_ramping_margin; dcn_ip 819 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_inter_dcn_tile_repeaters = dc->dcn_ip->max_inter_dcn_tile_repeaters; dcn_ip 821 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->can_vstartup_lines_exceed_vsync_plus_back_porch_lines_minus_one; dcn_ip 823 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->bug_forcing_luma_and_chroma_request_to_same_size_fixed; dcn_ip 1669 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->rob_buffer_size_in_kbyte, dcn_ip 1670 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->det_buffer_size_in_kbyte, dcn_ip 1671 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->dpp_output_buffer_pixels, dcn_ip 1672 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->opp_output_buffer_lines, dcn_ip 1673 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->pixel_chunk_size_in_kbyte, dcn_ip 1674 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->pte_enable, dcn_ip 1675 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->pte_chunk_size, dcn_ip 1676 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->meta_chunk_size, dcn_ip 1677 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->writeback_chunk_size, dcn_ip 1678 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->odm_capability, dcn_ip 1679 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->dsc_capability, dcn_ip 1680 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->line_buffer_size, dcn_ip 1681 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->max_line_buffer_lines, dcn_ip 1682 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->is_line_buffer_bpp_fixed, dcn_ip 1683 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->line_buffer_fixed_bpp, dcn_ip 1684 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->writeback_luma_buffer_size, dcn_ip 1685 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->writeback_chroma_buffer_size, dcn_ip 1686 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->max_num_dpp, dcn_ip 1687 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->max_num_writeback, dcn_ip 1688 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->max_dchub_topscl_throughput, dcn_ip 1689 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->max_pscl_tolb_throughput, dcn_ip 1690 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->max_lb_tovscl_throughput, dcn_ip 1691 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->max_vscl_tohscl_throughput, dcn_ip 1692 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->max_hscl_ratio, dcn_ip 1693 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->max_vscl_ratio, dcn_ip 1694 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->max_hscl_taps, dcn_ip 1695 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->max_vscl_taps, dcn_ip 1696 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->pte_buffer_size_in_requests, dcn_ip 1697 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->dispclk_ramping_margin, dcn_ip 1698 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->under_scan_factor * 100, dcn_ip 1699 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->max_inter_dcn_tile_repeaters, dcn_ip 1700 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->can_vstartup_lines_exceed_vsync_plus_back_porch_lines_minus_one, dcn_ip 1701 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->bug_forcing_luma_and_chroma_request_to_same_size_fixed, dcn_ip 1702 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->dcfclk_cstate_latency); dcn_ip 1721 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.rob_buffer_size_kbytes = dc->dcn_ip->rob_buffer_size_in_kbyte; dcn_ip 1722 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.det_buffer_size_kbytes = dc->dcn_ip->det_buffer_size_in_kbyte; dcn_ip 1723 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.dpp_output_buffer_pixels = dc->dcn_ip->dpp_output_buffer_pixels; dcn_ip 1724 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.opp_output_buffer_lines = dc->dcn_ip->opp_output_buffer_lines; dcn_ip 1725 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.pixel_chunk_size_kbytes = dc->dcn_ip->pixel_chunk_size_in_kbyte; dcn_ip 1726 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.pte_enable = dc->dcn_ip->pte_enable == dcn_bw_yes; dcn_ip 1727 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.pte_chunk_size_kbytes = dc->dcn_ip->pte_chunk_size; dcn_ip 1728 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.meta_chunk_size_kbytes = dc->dcn_ip->meta_chunk_size; dcn_ip 1729 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.writeback_chunk_size_kbytes = dc->dcn_ip->writeback_chunk_size; dcn_ip 1730 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.line_buffer_size_bits = dc->dcn_ip->line_buffer_size; dcn_ip 1731 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.max_line_buffer_lines = dc->dcn_ip->max_line_buffer_lines; dcn_ip 1732 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.IsLineBufferBppFixed = dc->dcn_ip->is_line_buffer_bpp_fixed == dcn_bw_yes; dcn_ip 1733 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.LineBufferFixedBpp = dc->dcn_ip->line_buffer_fixed_bpp; dcn_ip 1734 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.writeback_luma_buffer_size_kbytes = dc->dcn_ip->writeback_luma_buffer_size; dcn_ip 1735 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.writeback_chroma_buffer_size_kbytes = dc->dcn_ip->writeback_chroma_buffer_size; dcn_ip 1736 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.max_num_dpp = dc->dcn_ip->max_num_dpp; dcn_ip 1737 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.max_num_wb = dc->dcn_ip->max_num_writeback; dcn_ip 1738 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.max_dchub_pscl_bw_pix_per_clk = dc->dcn_ip->max_dchub_topscl_throughput; dcn_ip 1739 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.max_pscl_lb_bw_pix_per_clk = dc->dcn_ip->max_pscl_tolb_throughput; dcn_ip 1740 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.max_lb_vscl_bw_pix_per_clk = dc->dcn_ip->max_lb_tovscl_throughput; dcn_ip 1741 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.max_vscl_hscl_bw_pix_per_clk = dc->dcn_ip->max_vscl_tohscl_throughput; dcn_ip 1742 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.max_hscl_ratio = dc->dcn_ip->max_hscl_ratio; dcn_ip 1743 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.max_vscl_ratio = dc->dcn_ip->max_vscl_ratio; dcn_ip 1744 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.max_hscl_taps = dc->dcn_ip->max_hscl_taps; dcn_ip 1745 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.max_vscl_taps = dc->dcn_ip->max_vscl_taps; dcn_ip 1747 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.dispclk_ramp_margin_percent = dc->dcn_ip->dispclk_ramping_margin; dcn_ip 1748 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.underscan_factor = dc->dcn_ip->under_scan_factor; dcn_ip 1749 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.max_inter_dcn_tile_repeaters = dc->dcn_ip->max_inter_dcn_tile_repeaters; dcn_ip 1751 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->can_vstartup_lines_exceed_vsync_plus_back_porch_lines_minus_one == dcn_bw_yes; dcn_ip 1753 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->bug_forcing_luma_and_chroma_request_to_same_size_fixed == dcn_bw_yes; dcn_ip 1754 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.dcfclk_cstate_latency = dc->dcn_ip->dcfclk_cstate_latency; dcn_ip 557 drivers/gpu/drm/amd/display/dc/core/dc.c kfree(dc->dcn_ip); dcn_ip 558 drivers/gpu/drm/amd/display/dc/core/dc.c dc->dcn_ip = NULL; dcn_ip 576 drivers/gpu/drm/amd/display/dc/core/dc.c struct dcn_ip_params *dcn_ip; dcn_ip 617 drivers/gpu/drm/amd/display/dc/core/dc.c dcn_ip = kzalloc(sizeof(*dcn_ip), GFP_KERNEL); dcn_ip 618 drivers/gpu/drm/amd/display/dc/core/dc.c if (!dcn_ip) { dcn_ip 623 drivers/gpu/drm/amd/display/dc/core/dc.c dc->dcn_ip = dcn_ip; dcn_ip 489 drivers/gpu/drm/amd/display/dc/dc.h struct dcn_ip_params *dcn_ip; dcn_ip 1383 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c memcpy(dc->dcn_ip, &dcn10_ip_defaults, sizeof(dcn10_ip_defaults)); dcn_ip 1388 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c struct dcn_ip_params *dcn_ip = dc->dcn_ip; dcn_ip 1394 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c dcn_ip->max_num_dpp = 3; dcn_ip 1523 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c dc->dcn_ip->max_num_dpp = pool->base.pipe_count;