dcn2_0_nv12_soc   383 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv12_soc = { 0 };
dcn2_0_nv12_soc  3253 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		return &dcn2_0_nv12_soc;
dcn2_0_nv12_soc  3292 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.sr_exit_time_us =
dcn2_0_nv12_soc  3294 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
dcn2_0_nv12_soc  3296 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.urgent_latency_us =
dcn2_0_nv12_soc  3298 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.urgent_latency_pixel_data_only_us =
dcn2_0_nv12_soc  3300 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.urgent_latency_pixel_mixed_with_vm_data_us =
dcn2_0_nv12_soc  3302 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.urgent_latency_vm_data_only_us =
dcn2_0_nv12_soc  3304 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.urgent_out_of_order_return_per_channel_pixel_only_bytes =
dcn2_0_nv12_soc  3306 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.urgent_out_of_order_return_per_channel_pixel_and_vm_bytes =
dcn2_0_nv12_soc  3308 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.urgent_out_of_order_return_per_channel_vm_only_bytes =
dcn2_0_nv12_soc  3310 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only =
dcn2_0_nv12_soc  3312 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm =
dcn2_0_nv12_soc  3314 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only =
dcn2_0_nv12_soc  3316 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.max_avg_sdp_bw_use_normal_percent =
dcn2_0_nv12_soc  3318 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.max_avg_dram_bw_use_normal_percent =
dcn2_0_nv12_soc  3320 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.writeback_latency_us =
dcn2_0_nv12_soc  3322 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.ideal_dram_bw_after_urgent_percent =
dcn2_0_nv12_soc  3324 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.max_request_size_bytes =
dcn2_0_nv12_soc  3326 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.dram_channel_width_bytes =
dcn2_0_nv12_soc  3328 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.fabric_datapath_to_dcn_data_return_bytes =
dcn2_0_nv12_soc  3330 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.dcn_downspread_percent =
dcn2_0_nv12_soc  3332 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.downspread_percent =
dcn2_0_nv12_soc  3334 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.dram_page_open_time_ns =
dcn2_0_nv12_soc  3336 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.dram_rw_turnaround_time_ns =
dcn2_0_nv12_soc  3338 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.dram_return_buffer_per_channel_bytes =
dcn2_0_nv12_soc  3340 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.round_trip_ping_latency_dcfclk_cycles =
dcn2_0_nv12_soc  3342 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.urgent_out_of_order_return_per_channel_bytes =
dcn2_0_nv12_soc  3344 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.channel_interleave_bytes =
dcn2_0_nv12_soc  3346 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.num_banks =
dcn2_0_nv12_soc  3348 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.num_chans =
dcn2_0_nv12_soc  3350 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.vmm_page_size_bytes =
dcn2_0_nv12_soc  3352 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.dram_clock_change_latency_us =
dcn2_0_nv12_soc  3355 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.dram_clock_change_latency_us = 10;
dcn2_0_nv12_soc  3356 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.writeback_dram_clock_change_latency_us =
dcn2_0_nv12_soc  3358 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.return_bus_width_bytes =
dcn2_0_nv12_soc  3360 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.dispclk_dppclk_vco_speed_mhz =
dcn2_0_nv12_soc  3362 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.xfc_bus_transport_time_us =
dcn2_0_nv12_soc  3364 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.xfc_xbuf_latency_tolerance_us =
dcn2_0_nv12_soc  3366 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.use_urgent_burst_bw =
dcn2_0_nv12_soc  3368 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.num_states =
dcn2_0_nv12_soc  3371 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		for (i = 0; i < dcn2_0_nv12_soc.num_states; i++) {
dcn2_0_nv12_soc  3372 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			dcn2_0_nv12_soc.clock_limits[i].state =
dcn2_0_nv12_soc  3374 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			dcn2_0_nv12_soc.clock_limits[i].dcfclk_mhz =
dcn2_0_nv12_soc  3376 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			dcn2_0_nv12_soc.clock_limits[i].fabricclk_mhz =
dcn2_0_nv12_soc  3378 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			dcn2_0_nv12_soc.clock_limits[i].dispclk_mhz =
dcn2_0_nv12_soc  3380 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			dcn2_0_nv12_soc.clock_limits[i].dppclk_mhz =
dcn2_0_nv12_soc  3382 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			dcn2_0_nv12_soc.clock_limits[i].phyclk_mhz =
dcn2_0_nv12_soc  3384 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			dcn2_0_nv12_soc.clock_limits[i].socclk_mhz =
dcn2_0_nv12_soc  3386 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			dcn2_0_nv12_soc.clock_limits[i].dscclk_mhz =
dcn2_0_nv12_soc  3388 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =