dclr1             912 drivers/edac/amd64_edac.c 		debug_dump_dramcfg_low(pvt, pvt->dclr1, 1);
dclr1            1137 drivers/edac/amd64_edac.c 	pvt->dclr1 = 0;
dclr1            1349 drivers/edac/amd64_edac.c 	u32 dclr = dct ? pvt->dclr1 : pvt->dclr0;
dclr1            1516 drivers/edac/amd64_edac.c 	u32 dclr = dct ? pvt->dclr1 : pvt->dclr0;
dclr1            2830 drivers/edac/amd64_edac.c 		amd64_read_dct_pci_cfg(pvt, 1, DCLR0, &pvt->dclr1);
dclr1             353 drivers/edac/amd64_edac.h 	u32 dclr1;		/* DRAM Configuration Low DCT1 reg */