dclr0 750 drivers/edac/amd64_edac.c if (pvt->dclr0 & BIT(bit)) dclr0 893 drivers/edac/amd64_edac.c debug_dump_dramcfg_low(pvt, pvt->dclr0, 0); dclr0 1064 drivers/edac/amd64_edac.c pvt->dram_type = (pvt->dclr0 & BIT(18)) ? MEM_DDR : MEM_RDDR; dclr0 1071 drivers/edac/amd64_edac.c pvt->dram_type = (pvt->dclr0 & BIT(16)) ? MEM_DDR2 : MEM_RDDR2; dclr0 1092 drivers/edac/amd64_edac.c else if (pvt->dclr0 & BIT(16)) dclr0 1121 drivers/edac/amd64_edac.c pvt->dram_type = (pvt->dclr0 & BIT(16)) ? MEM_DDR3 : MEM_RDDR3; dclr0 1131 drivers/edac/amd64_edac.c flag = pvt->dclr0 & WIDTH_128; dclr0 1134 drivers/edac/amd64_edac.c flag = pvt->dclr0 & REVE_WIDTH_128; dclr0 1349 drivers/edac/amd64_edac.c u32 dclr = dct ? pvt->dclr1 : pvt->dclr0; dclr0 1406 drivers/edac/amd64_edac.c if (pvt->fam == 0x10 && (pvt->dclr0 & WIDTH_128)) dclr0 1516 drivers/edac/amd64_edac.c u32 dclr = dct ? pvt->dclr1 : pvt->dclr0; dclr0 2826 drivers/edac/amd64_edac.c amd64_read_dct_pci_cfg(pvt, 0, DCLR0, &pvt->dclr0); dclr0 352 drivers/edac/amd64_edac.h u32 dclr0; /* DRAM Configuration Low DCT0 reg */