DP_SEC_CNTL6       85 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	SRI(DP_SEC_CNTL6, DP, id), \
DP_SEC_CNTL6      130 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	uint32_t DP_SEC_CNTL6;
DP_SEC_CNTL6      319 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c 		REG_UPDATE(DP_SEC_CNTL6,
DP_SEC_CNTL6      354 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c 		REG_GET(DP_SEC_CNTL6, DP_SEC_GSP7_LINE_NUM, &s->sec_gsp_pps_line_num);