DP_SEC_ATP_ENABLE 1618 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 		tmp = REG_SET_FIELD(tmp, DP_SEC_CNTL, DP_SEC_ATP_ENABLE, 1);
DP_SEC_ATP_ENABLE 1508 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 			DP_SEC_ATP_ENABLE, 1,
DP_SEC_ATP_ENABLE 1524 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 			DP_SEC_ATP_ENABLE, 0,
DP_SEC_ATP_ENABLE  199 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SE_SF(DP_SEC_CNTL, DP_SEC_ATP_ENABLE, mask_sh),\
DP_SEC_ATP_ENABLE  279 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SE_SF(DP0_DP_SEC_CNTL, DP_SEC_ATP_ENABLE, mask_sh),\
DP_SEC_ATP_ENABLE  475 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_ATP_ENABLE;
DP_SEC_ATP_ENABLE  606 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint32_t DP_SEC_ATP_ENABLE;
DP_SEC_ATP_ENABLE 1447 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 			DP_SEC_ATP_ENABLE, 1,
DP_SEC_ATP_ENABLE 1463 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 			DP_SEC_ATP_ENABLE, 0,
DP_SEC_ATP_ENABLE  251 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	SE_SF(DP0_DP_SEC_CNTL, DP_SEC_ATP_ENABLE, mask_sh),\
DP_SEC_ATP_ENABLE  441 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	type DP_SEC_ATP_ENABLE;\