DP_SEC_AIP_ENABLE 1619 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 		tmp = REG_SET_FIELD(tmp, DP_SEC_CNTL, DP_SEC_AIP_ENABLE, 1);
DP_SEC_AIP_ENABLE 1509 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 			DP_SEC_AIP_ENABLE, 1);
DP_SEC_AIP_ENABLE 1525 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 			DP_SEC_AIP_ENABLE, 0,
DP_SEC_AIP_ENABLE  200 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SE_SF(DP_SEC_CNTL, DP_SEC_AIP_ENABLE, mask_sh),\
DP_SEC_AIP_ENABLE  280 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SE_SF(DP0_DP_SEC_CNTL, DP_SEC_AIP_ENABLE, mask_sh),\
DP_SEC_AIP_ENABLE  476 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_AIP_ENABLE;
DP_SEC_AIP_ENABLE  607 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint32_t DP_SEC_AIP_ENABLE;
DP_SEC_AIP_ENABLE 1448 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 			DP_SEC_AIP_ENABLE, 1);
DP_SEC_AIP_ENABLE 1464 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 			DP_SEC_AIP_ENABLE, 0,
DP_SEC_AIP_ENABLE  252 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	SE_SF(DP0_DP_SEC_CNTL, DP_SEC_AIP_ENABLE, mask_sh),\
DP_SEC_AIP_ENABLE  442 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	type DP_SEC_AIP_ENABLE;\