DP_PIXEL_FORMAT   307 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 		REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,
DP_PIXEL_FORMAT   311 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 		REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,
DP_PIXEL_FORMAT   319 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 				REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,
DP_PIXEL_FORMAT   327 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 		REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,
DP_PIXEL_FORMAT   338 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 		REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,
DP_PIXEL_FORMAT   352 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 		REG_UPDATE(DP_PIXEL_FORMAT, DP_COMPONENT_DEPTH,
DP_PIXEL_FORMAT   356 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 		REG_UPDATE(DP_PIXEL_FORMAT, DP_COMPONENT_DEPTH,
DP_PIXEL_FORMAT   360 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 		REG_UPDATE(DP_PIXEL_FORMAT, DP_COMPONENT_DEPTH,
DP_PIXEL_FORMAT   365 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 		REG_UPDATE(DP_PIXEL_FORMAT, DP_COMPONENT_DEPTH,
DP_PIXEL_FORMAT   369 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 		REG_UPDATE(DP_PIXEL_FORMAT, DP_COMPONENT_DEPTH,
DP_PIXEL_FORMAT   453 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 				DP_PIXEL_FORMAT,
DP_PIXEL_FORMAT    86 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SRI(DP_PIXEL_FORMAT, DP, id), \
DP_PIXEL_FORMAT   132 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SE_SF(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING, mask_sh),\
DP_PIXEL_FORMAT   133 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SE_SF(DP_PIXEL_FORMAT, DP_COMPONENT_DEPTH, mask_sh),\
DP_PIXEL_FORMAT   134 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SE_SF(DP_PIXEL_FORMAT, DP_DYN_RANGE, mask_sh),\
DP_PIXEL_FORMAT   135 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SE_SF(DP_PIXEL_FORMAT, DP_YCBCR_RANGE, mask_sh),\
DP_PIXEL_FORMAT   660 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint32_t DP_PIXEL_FORMAT;
DP_PIXEL_FORMAT   346 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 	REG_UPDATE_2(DP_PIXEL_FORMAT,
DP_PIXEL_FORMAT    82 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	SRI(DP_PIXEL_FORMAT, DP, id), \
DP_PIXEL_FORMAT   127 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	uint32_t DP_PIXEL_FORMAT;
DP_PIXEL_FORMAT   537 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c 	REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_COMBINE, odm_combine);