dccr 36 arch/powerpc/include/asm/mpc5121.h u32 dccr; /* DIU Clock Control Register */ dccr 213 arch/sparc/include/asm/leon.h unsigned long dccr; /* 0x0c - Data Cache Configuration Register */ dccr 218 arch/sparc/mm/leon_mm.c unsigned long ccr, iccr, dccr; dccr 228 arch/sparc/mm/leon_mm.c : "=r"(ccr), "=r"(iccr), "=r"(dccr) dccr 235 arch/sparc/mm/leon_mm.c regs->dccr = dccr; dccr 255 arch/sparc/mm/leon_mm.c sets = (cregs.dccr & LEON3_XCCR_SETS_MASK) >> 24; dccr 257 arch/sparc/mm/leon_mm.c ssize = 1 << ((cregs.dccr & LEON3_XCCR_SSIZE_MASK) >> 20);