dcc_enable       1148 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h 		uint64_t dcc_enable:1;
dcc_enable       1154 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h 		uint64_t dcc_enable:1;
dcc_enable       1176 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h 		uint64_t dcc_enable:1;
dcc_enable       1182 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h 		uint64_t dcc_enable:1;
dcc_enable       1195 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h 		uint64_t dcc_enable:1;
dcc_enable       1199 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h 		uint64_t dcc_enable:1;
dcc_enable       1212 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h 		uint64_t dcc_enable:1;
dcc_enable       1216 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h 		uint64_t dcc_enable:1;
dcc_enable        177 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable        207 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable        583 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable        618 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable        678 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					if (v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable        806 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					if (v->pte_enable == dcn_bw_yes && v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable        815 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					if (v->pte_enable == dcn_bw_yes || v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable        846 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->pte_enable == dcn_bw_yes && v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable        852 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->pte_enable == dcn_bw_yes || v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable       1229 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable       1289 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable       1369 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable       1375 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable       1470 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable       1529 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable       1688 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->pte_enable == dcn_bw_yes && v->dcc_enable[k] == dcn_bw_yes) {
dcc_enable       1700 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if ((v->pte_enable == dcn_bw_yes || v->dcc_enable[k] == dcn_bw_yes)) {
dcc_enable        888 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			v->dcc_enable[input_idx] = dcn_bw_yes;
dcc_enable        965 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 				v->dcc_enable[input_idx] = pipe->plane_state->dcc.enable ? dcn_bw_yes : dcn_bw_no;
dcc_enable        975 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 				v->dcc_enable[input_idx] = dc->res_pool->hubbub->funcs->dcc_support_pixel_format(
dcc_enable        182 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h 	enum dcn_bw_defs dcc_enable[number_of_planes_minus_one + 1];