DP_MSA_TIMING_PARAM4  511 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 		if (REG(DP_MSA_TIMING_PARAM4))
DP_MSA_TIMING_PARAM4  512 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 			REG_SET_2(DP_MSA_TIMING_PARAM4, 0,
DP_MSA_TIMING_PARAM4  112 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SRI(DP_MSA_TIMING_PARAM4, DP, id), \
DP_MSA_TIMING_PARAM4  693 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint32_t DP_MSA_TIMING_PARAM4;
DP_MSA_TIMING_PARAM4  469 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 	REG_SET_2(DP_MSA_TIMING_PARAM4, 0,
DP_MSA_TIMING_PARAM4   79 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	SRI(DP_MSA_TIMING_PARAM4, DP, id), \
DP_MSA_TIMING_PARAM4  164 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	uint32_t DP_MSA_TIMING_PARAM4;