dc_reg 99 drivers/gpu/ipu-v3/ipu-dc.c void __iomem *dc_reg; dc_reg 220 drivers/gpu/ipu-v3/ipu-dc.c writel(width, priv->dc_reg + DC_DISP_CONF2(dc->di)); dc_reg 284 drivers/gpu/ipu-v3/ipu-dc.c reg = readl(priv->dc_reg + DC_MAP_CONF_VAL(ptr)); dc_reg 287 drivers/gpu/ipu-v3/ipu-dc.c writel(reg, priv->dc_reg + DC_MAP_CONF_VAL(ptr)); dc_reg 289 drivers/gpu/ipu-v3/ipu-dc.c reg = readl(priv->dc_reg + DC_MAP_CONF_PTR(map)); dc_reg 292 drivers/gpu/ipu-v3/ipu-dc.c writel(reg, priv->dc_reg + DC_MAP_CONF_PTR(map)); dc_reg 297 drivers/gpu/ipu-v3/ipu-dc.c u32 reg = readl(priv->dc_reg + DC_MAP_CONF_PTR(map)); dc_reg 300 drivers/gpu/ipu-v3/ipu-dc.c priv->dc_reg + DC_MAP_CONF_PTR(map)); dc_reg 354 drivers/gpu/ipu-v3/ipu-dc.c priv->dc_reg = devm_ioremap(dev, base, PAGE_SIZE); dc_reg 356 drivers/gpu/ipu-v3/ipu-dc.c if (!priv->dc_reg || !priv->dc_tmpl_reg) dc_reg 362 drivers/gpu/ipu-v3/ipu-dc.c priv->channels[i].base = priv->dc_reg + channel_offsets[i]; dc_reg 372 drivers/gpu/ipu-v3/ipu-dc.c priv->dc_reg + DC_GEN);