DP_DPHY_PRBS_CNTL 164 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c REG_UPDATE(DP_DPHY_PRBS_CNTL, DPHY_PRBS_EN, 0); DP_DPHY_PRBS_CNTL 302 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c REG_UPDATE_2(DP_DPHY_PRBS_CNTL, DP_DPHY_PRBS_CNTL 322 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c REG_UPDATE_2(DP_DPHY_PRBS_CNTL, DP_DPHY_PRBS_CNTL 55 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h SRI(DP_DPHY_PRBS_CNTL, DP, id), \ DP_DPHY_PRBS_CNTL 136 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h uint32_t DP_DPHY_PRBS_CNTL; DP_DPHY_PRBS_CNTL 136 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c REG_UPDATE(DP_DPHY_PRBS_CNTL, DPHY_PRBS_EN, 0); DP_DPHY_PRBS_CNTL 271 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c REG_UPDATE_2(DP_DPHY_PRBS_CNTL, DP_DPHY_PRBS_CNTL 291 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c REG_UPDATE_2(DP_DPHY_PRBS_CNTL, DP_DPHY_PRBS_CNTL 48 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h SRI(DP_DPHY_PRBS_CNTL, DP, id), \ DP_DPHY_PRBS_CNTL 90 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h uint32_t DP_DPHY_PRBS_CNTL;