DP_DPHY_INTERNAL_CTRL 269 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c ASSERT(REG(DP_DPHY_INTERNAL_CTRL)); DP_DPHY_INTERNAL_CTRL 270 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c value = REG_READ(DP_DPHY_INTERNAL_CTRL); DP_DPHY_INTERNAL_CTRL 284 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c REG_WRITE(DP_DPHY_INTERNAL_CTRL, value); DP_DPHY_INTERNAL_CTRL 75 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h SRI(DP_DPHY_INTERNAL_CTRL, DP, id), \ DP_DPHY_INTERNAL_CTRL 79 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h SRI(DP_DPHY_INTERNAL_CTRL, DP, id), \ DP_DPHY_INTERNAL_CTRL 85 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h SRI(DP_DPHY_INTERNAL_CTRL, DP, id), \ DP_DPHY_INTERNAL_CTRL 91 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h SRI(DP_DPHY_INTERNAL_CTRL, DP, id), \ DP_DPHY_INTERNAL_CTRL 104 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h SRI(DP_DPHY_INTERNAL_CTRL, DP, id), \ DP_DPHY_INTERNAL_CTRL 135 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h uint32_t DP_DPHY_INTERNAL_CTRL; DP_DPHY_INTERNAL_CTRL 259 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \ DP_DPHY_INTERNAL_CTRL 236 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c if (!REG(DP_DPHY_INTERNAL_CTRL)) DP_DPHY_INTERNAL_CTRL 239 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c value = REG_READ(DP_DPHY_INTERNAL_CTRL); DP_DPHY_INTERNAL_CTRL 253 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c REG_WRITE(DP_DPHY_INTERNAL_CTRL, value); DP_DPHY_INTERNAL_CTRL 65 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h SRI(DP_DPHY_INTERNAL_CTRL, DP, id), \ DP_DPHY_INTERNAL_CTRL 89 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h uint32_t DP_DPHY_INTERNAL_CTRL; DP_DPHY_INTERNAL_CTRL 304 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \ DP_DPHY_INTERNAL_CTRL 599 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \